metal cut

**Metal Cut** is a **complementary lithographic process in FinFET and gate-all-around transistor back-end metallization that uses a dedicated mask to selectively remove sections of continuous metal lines, creating the breaks and line ends that define interconnect routing topology at pitches too tight for direct-print line-end patterning** — solving the fundamental challenge that printing isolated line ends directly at sub-20nm pitch produces poor process window and systematic bridging defects. **What Is Metal Cut?** - **Definition**: A lithographic process step where a separate photomask exposes a resist pattern that, after etching, removes specific sections of a previously patterned continuous metal line, creating intentional breaks in the metallization at precisely controlled locations. - **Continuous Line Philosophy**: Rather than patterning individual metal segments with their ends printed directly (which has poor process window at tight pitch), the metal cut approach first prints a continuous unbroken line, then uses a separate cut mask to sever unwanted sections. - **Line-End Challenge**: At sub-20nm pitches, directly printing line ends requires features smaller than the lithographic resolution limit — line-end pullback, bridging between adjacent tips, and CD variation all degrade yield. - **Self-Aligned Cut (SAC)**: Advanced implementations align metal cuts to pre-existing features (vias, mandrels) using self-alignment, dramatically relaxing overlay requirements between the metal and cut layers. **Why Metal Cut Matters** - **Process Window Improvement**: Printing continuous unidirectional lines has 2-3× larger process window than printing isolated line ends — metal cut separates these two patterning challenges into independent steps. - **FinFET BEOL Integration**: Advanced back-end interconnect at metal layers M0-M3 requires metal cut to define routing segments in unidirectional layouts where all lines run in one direction. - **Via-to-Cut Overlay**: Cut placement accuracy relative to the via layer determines whether connections are made or broken — overlay specifications of ±2-3nm required at 7nm and below. - **Design Rule Impact**: Metal-cut-aware design rules restrict minimum segment lengths, cut sizes, and placement relative to underlying features. - **EUV Cuts**: At advanced nodes, metal cuts at tight pitch are patterned using EUV lithography, which provides superior resolution and process window for small rectangular cut features. **Metal Cut Process Flow** **Step 1 — Continuous Metal Patterning**: - Unidirectional metal lines patterned using multi-patterning (SADP or SAQP) — continuous lines with no intentional breaks. - Excellent process window due to regular, periodic pitch without any line ends to print. **Step 2 — Cut Mask Application**: - Positive or negative tone resist applied over patterned metal or metal hard mask. - Cut mask exposes only the regions where metal should be removed. - Cut features sized to ensure complete metal removal with sufficient edge overlap to tolerate overlay error. **Step 3 — Selective Metal Etch**: - Selective metal etch removes exposed metal through resist openings. - Must clear metal completely without attacking adjacent intact lines — etch selectivity and directionality critical. **Cut Alignment Strategies** | Strategy | Alignment Reference | Overlay Requirement | Node | |----------|--------------------|--------------------|------| | **Unaligned Cut** | Previous metal layer marks | ± 5-8nm | 28nm | | **Via-Aligned Cut** | Via directly below metal | ± 3-5nm | 14-10nm | | **Self-Aligned Cut** | Mandrel or dielectric features | ± 1-2nm | 7nm and below | Metal Cut is **the precision surgical tool of advanced BEOL metallization** — enabling continuous-line patterning approaches that provide robust process window for sub-20nm interconnects while selectively severing connections with dedicated cut masks, making dense unidirectional routing architectures practical for the most advanced FinFET and gate-all-around logic technologies.