Multiplying DAC

# Multiplying DAC: Use a Digital Word to Scale an Analog Signal

A multiplying DAC (MDAC) accepts a reference that can vary with time and scales it by a digitally selected coefficient. With an appropriate output circuit, the reference can be an AC signal rather than only a fixed DC voltage. This makes the converter useful for programmable attenuation, amplitude control and related analog processing.

The allowed reference amplitude, polarity and bandwidth are device-specific. An ordinary DAC reference pin should not be assumed to accept an arbitrary signal simply because it is labeled “reference.”

## 1. Follow the analog and digital inputs separately

Multiplying DAC analog reference and digital gain pathsConceptual analog reference input feeds a current-output multiplying DAC, controlled by digital code D. An inverting current-to-voltage stage gives ideal output minus reference times D over two to N with matched feedback. This block diagram omits physical feedback, compensation and bias connections.The reference can be the analog signalConceptual current-output MDAC with matched I/V conversionREFERENCEV ref(t)MDACD / 2^NI/V STAGEInverting gainDigital code DV out(t) = −V ref(t) × D / 2^NIdeal matched-feedback configuration; actual circuit matters.Hold D fixed: the analog reference still passes through.Change D: the circuit changes its scaling coefficient.The minus sign belongs to this inverting configuration.

*Conceptual block diagram for a common current-output MDAC application. It omits the physical feedback connection, compensation, reference driver and biasing. The equation assumes the matched-feedback inverting configuration, not every possible MDAC circuit.*

For an N-bit unsigned code D, a common ideal transfer is VOUT(t) = −VREF(t)D/2^N, where D ranges from zero to 2^N − 1. The reference supplies the analog waveform; the code supplies its scale factor. With D held constant, the reference can continue changing and the output follows the scaled waveform within the path’s bandwidth and operating limits.

A current-output MDAC commonly uses an amplifier to turn output current into voltage. A matched feedback resistor can establish the intended gain relationship. The amplifier must keep the DAC summing node near the required potential while providing the desired output swing. Consult the actual device circuit rather than wiring from a conceptual equation alone.

## 2. Calculate an AC scaling example

Calculated multiplying DAC sinusoidal output at two codesIdeal eight-bit multiplying DAC with two-volt peak sinusoidal reference. Code sixty four gives minus one quarter gain and half-volt peak output. Code one hundred twenty eight gives minus one half gain and one-volt peak output. Both are inverted with unchanged frequency. Maximum code two hundred fifty five gives gain minus two hundred fifty five over two hundred fifty six.Same reference frequency, code-set amplitudeCalculated ideal 8-bit example · V ref(t) = 2 sin(ωt) V+1 V0−1 VOne period →D = 64: gain −0.25Output peak = 0.50 VD = 128: gain −0.50Output peak = 1.00 VD = 255 gives −255/256, not exactly −1.

*Calculated ideal outputs, not measured waveforms. Both curves use the same 2-V-peak sine reference. Finite bandwidth, offset, feedthrough and code-update transients are excluded.*

For an 8-bit MDAC, D = 64 gives −64/256 = −0.25 gain, so a 2-V-peak reference produces a 0.5-V-peak inverted output. D = 128 gives −0.5 gain and a 1-V-peak output. The frequency remains unchanged for a fixed coefficient in this ideal model.

At maximum code 255, the ideal gain is −255/256, slightly short of −1. The denominator is 256, not 255, for this conventional transfer. At code zero the ideal signal contribution is zero, but an actual circuit can retain offset, leakage or AC feedthrough.

## 3. Understand the quadrant description

In the simple inverting configuration, the reference may have either polarity while the unsigned code coefficient has one sign. This is commonly described as two-quadrant multiplication. Additional circuitry and an appropriate transfer mapping can support a coefficient that changes sign, giving four-quadrant operation.

The output amplifier’s supply rails, input behavior and output swing constrain the usable waveform. A DAC reference input that accepts a bipolar signal does not imply that an attached single-supply amplifier can generate every resulting positive and negative output voltage.

## 4. Separate multiplying bandwidth from update speed

Multiplying bandwidth describes the reference-to-output AC response under stated conditions. Digital interface rate describes how quickly code words can be transferred. Code-update settling describes the response after the coefficient changes. These limits answer different questions.

Holding one code while sweeping reference frequency tests the analog multiplying path. Holding a DC reference while changing codes tests a different dynamic path. A system that changes both inputs needs both behaviors, including their interaction, checked under the intended signal conditions.

The usable response depends on the MDAC network, output capacitance, amplifier and feedback components. A nominal −3-dB bandwidth does not guarantee the flatness, distortion or phase accuracy required across the entire application band. Test representative codes as well as reference amplitudes and frequencies.

## 5. Treat the reference driver and I/V stage as signal circuitry

The reference source must drive the specified input impedance and capacitance with adequate linearity, noise and settling. Reference-driver distortion becomes output distortion through the intended signal path. Check any code dependence of loading in the selected architecture.

At the output, noise gain, capacitance and feedback determine stability and precision settling. Amplifier slew rate and output headroom can limit large AC signals even when small-signal bandwidth appears sufficient. Compensation may improve stability while narrowing bandwidth, so evaluate the complete network rather than a single amplifier specification.

DAC glitch impulse can appear when D changes. Switching from one amplitude coefficient to another also deliberately modulates the waveform; abrupt changes create spectral content even in an ideal multiplier. Separate that intended modulation from unwanted switching artifacts and settling errors.

## 6. Verify the required operating mode

Measure gain versus code and reference frequency, output offset, zero-code feedthrough, distortion and noise. Include maximum reference amplitude, critical low codes and representative coefficient updates. Record reference source impedance, amplifier, feedback network, load and supplies.

For an AC attenuator, specify attenuation accuracy and residual feedthrough rather than relying only on nominal bit resolution. For waveform amplitude control, evaluate phase and transient behavior when gain changes. If the code is used as a time-varying multiplier, analyze the resulting sidebands as part of the intended signal as well as the unwanted error.

A useful model includes the digital coefficient, actual analog multiplying response and output-stage limitations. That model makes clear which errors require calibration, a better reference driver, different compensation or a different converter.

## References

  • [Analog Devices AN-1085: Multiplying DACs—AC/Arbitrary Reference Applications](https://www.analog.com/en/resources/app-notes/an-1085.html) — MDAC architecture, reference handling and amplifier considerations.
  • [Analog Devices AN-1231: AC Signal Processing Using Current-Output DACs](https://www.analog.com/en/resources/app-notes/an-1231.html) — two-quadrant transfer and multiplying-bandwidth example.
  • [Analog Devices AD5415 data sheet](https://www.analog.com/media/en/technical-documentation/data-sheets/AD5415.pdf) — a concrete multiplying DAC and device-specific transfer and operating limits.

Take multiplying DAC further

Ask the copilot about this term, or have our engineers assess it against your process.

Ask CFSGPT about this → Request a technical assessment → Open the CFS app