3D NAND

# Close: Where 3D NAND Scaling Stands Today

## 20. 20. Close Where 3D NAND Scaling Stands Today

By the mid-2020s, commercial 3D NAND had moved well past two hundred stacked layers, with several manufacturers shipping or sampling generations beyond three hundred and approaching or exceeding four hundred layers, built using multi-deck string stacking to manage the channel-hole etch described in steps 12-16 and, in several manufacturers' designs, CMOS-Under-Array or Xtacking-style bonding to keep die area efficient as described in steps 17-19. The architectural pivot that opened this series — trading lithographic cell-shrink for layer-count scaling because planar NAND's cell-to-cell interference and atomic-scale tunnel-oxide walls left no room to keep shrinking — has held for over a decade now, with layer count itself becoming the industry's primary generation-to-generation scaling metric, the direct descendant of the single decision covered in step 3. This series deliberately told that architecture and scaling arc on its own terms, step by step, rather than retelling material already covered elsewhere on this site: the invention history of floating-gate and charge-trap non-volatile memory, including Fujio Masuoka's original flash work briefly named in step 2, is told in full in the `eprom_eeprom_history` series, and a denser, single-article treatment of 3D NAND's architecture and scaling, including the 400-layer generation specifically, already exists in this site's standalone `nand_complete_art.md` and `nand_400_layer_art.md` articles. Readers who arrived here for the step-by-step build-up this series provides, and now want either the invention history or a single dense reference article on the same material, should go to those two places next.

Where 3D NAND Scaling Stands by the Mid-2020s 20. Close Where 3D NAND Scaling Stands Today LAYER COUNT Commercial generations well past 200 layers Several manufacturers at 300+, approaching or past 400 HOW IT GOT THERE Multi-deck string stacking manages the channel-hole etch CuA / Xtacking-style bonding keeps die area efficient THE ORIGINAL PIVOT HOLDS Layer count remains the primary scaling metric Direct descendant of the vertical pivot in step 3 a decade-plus-old architectural decision, still the industry's scaling path today
Where to Go Next for Material This Series Named but Did Not Retell 20. Close Where 3D NAND Scaling Stands Today INVENTION HISTORY eprom_eeprom_history series Fujio Masuoka's floating-gate/charge-trap invention work DENSER SINGLE-ARTICLE TREATMENT nand_complete_art.md nand_400_layer_art.md this series told the architecture arc step by step; those two go deeper or denser

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