Nanometer-Era

The nanometer era describes a period of semiconductor development rather than a precise physical boundary. One nanometer is one billionth of a meter, and one micron equals one thousand nanometers. Thus 130 nm and 0.13 micron describe the same nominal scale. Changing the unit used in a node name does not itself create a new device principle.

Process labels increasingly summarized integrated platforms rather than one literal feature dimension. A published 90 nm technology could contain 45 nm gate-length transistors. Gate length, metal pitch, oxide thickness, and wafer diameter describe different quantities. A meaningful comparison identifies which dimension or performance measure is being discussed.

Materials and device geometry became central extensions of conventional scaling. Strained silicon altered transport, high-k dielectrics improved the relation between physical thickness and gate capacitance, and metal electrodes changed gate-stack behavior. These techniques solved different problems. Their success depended on interfaces, thermal processing, and reproducible integration across an entire wafer.

Patterning and wiring required their own parallel advances. Immersion exposure, computational correction, and multiple patterning extended optical lithography. Low-k materials reduced interconnect capacitance but introduced mechanical and reliability challenges. Improvements in transistor switching therefore had to be coordinated with the technology used to connect devices.

System progress increasingly depended on managing power and useful specialization. Multiple cores, accelerators, and low-power operating states provide ways to use additional transistors within thermal constraints. Their value depends on software and communication overhead as well as process density. The period is a history of interacting engineering changes rather than a sequence of shrinking numbers alone.

Sources and further reading. [Thompson et al., A Logic Nanotechnology Featuring Strained-Silicon, 2004](https://doi.org/10.1109/LED.2004.825195); [Intel high-k and metal-gate announcement, January 2007](https://www.intel.com/pressroom/archive/releases/2007/20070128comp.htm); [ASML technology history](https://www.asml.com/en/company/about-asml/history).

Read Nanometer era as an era in which materials, patterning, device structures, and power-aware architecture jointly extended semiconductor capability.