nanowire fet

```svg ``` Nanowire FET Overview Nanowire FET is a Gate-All-Around (GAA) transistor with cylindrical (wire-shaped) silicon channels fully surrounded by the gate electrode. It offers the best electrostatic control of any transistor geometry. Nanowire vs. Nanosheet - Nanowire: Circular/small cross-section (~5-10nm diameter). Best gate control but limited drive current per wire. - Nanosheet: Wider rectangular cross-section (10-50nm wide). More drive current per sheet. Preferred by industry for production. - Both are GAA: Gate wraps all four sides. Nanosheets are essentially wide nanowires. Fabrication 1. Grow alternating Si/SiGe superlattice stack. 2. Pattern into narrow fin structures (< 10nm width creates wire-like cross-section). 3. Dummy gate patterning, spacer formation, S/D epitaxy. 4. Selective SiGe removal releases suspended Si nanowires. 5. Gate-all-around high-k/metal gate deposited wrapping each wire. Advantages - Superior electrostatic control: Near-ideal subthreshold slope (~62 mV/dec at room temp). - Excellent short-channel effect suppression: DIBL < 30 mV/V. - Low leakage: Gate fully controls the channel with no ungated surfaces. Challenges - Drive Current: Small cross-section limits current per wire. Must stack many wires (4-8) to get adequate drive. - Variability: Small dimensional variations in wire diameter have large impact on threshold voltage. - Parasitic Capacitance: Gate wrapping multiple wires in close proximity increases capacitance.