nre (non-recurring engineering)

Non-Recurring Engineering costs are the **one-time expenses** incurred to design, develop, and prepare a new semiconductor product for manufacturing. NRE is paid once regardless of how many chips are eventually produced. **NRE Cost Components** • **Mask set**: $1M (mature node) to $10M+ (leading edge). The single largest NRE item for advanced nodes • **Design engineering**: Salaries for the design team over the 12-36 month design cycle. Can be $10-50M+ for complex SoCs • **EDA tools**: Software licenses for design, verification, and signoff tools. $5-20M+ per year for a large design team • **IP licensing**: Upfront fees for licensed IP blocks (ARM cores, SerDes, USB PHY). $1-10M depending on IP portfolio • **Prototyping**: Shuttle runs, FPGA prototyping, test chip fabrication. $100K-1M • **Qualification**: Reliability testing, characterization, certification. $500K-2M **Total NRE by Node** • **180nm-65nm**: $5-15M total NRE • **28nm**: $30-50M • **7nm**: $100-200M • **5nm**: $200-400M • **3nm**: $500M+ (estimated) **NRE Amortization** NRE cost per chip = Total NRE / Total chips sold over product lifetime. A $200M NRE for a chip selling 100 million units = **$2 per chip** NRE cost. This is why **volume matters**—the same $200M NRE on only 1 million units = **$200 per chip**, making the product uneconomical. **Who Bears NRE?** For fabless companies designing their own chips, they pay full NRE. For ASIC customers, the chip vendor may absorb NRE and recover it through per-unit pricing. **High NRE at advanced nodes** is driving industry consolidation—fewer companies can justify the investment, leading to more chiplet and IP-reuse strategies to amortize NRE across multiple products.