on-chip variation (ocv)

**On-Chip Variation (OCV)** is the **within-die systematic and random process variation** that causes nominally identical transistors and interconnects on the same chip to have different electrical properties — requiring timing analysis to account for the fact that the launching and capturing clock paths (and data paths) may experience different local conditions. **Why OCV Matters** - Traditional timing analysis assumes all devices on a chip operate at the same process corner (e.g., all slow or all fast). - In reality, **variation exists within a single die**: one region may be slightly faster, another slightly slower — due to across-die gradients in doping, gate length, oxide thickness, metal thickness, etc. - If a launching clock path happens to be in a "fast" region and a capturing clock path is in a "slow" region (or vice versa), the effective clock skew changes — **creating timing violations** that a uniform-corner analysis would miss. **Sources of OCV** - **Systematic Variation**: Gradual gradients across the die — center-to-edge patterns from lithography lens, CMP, implant, etch non-uniformity. - **Random Variation**: Statistical fluctuations in individual devices — Random Dopant Fluctuation (RDF), Line Edge Roughness (LER), gate granularity. Uncorrelated between devices. - **Layout-Dependent Effects**: Transistor performance depends on its local layout environment — well proximity, LOD (length of diffusion), STI stress. **OCV in Timing Analysis** - **Derate Factors**: Apply a pessimistic multiplier to cell and net delays: - **Early Derate**: Multiply delays on the "early" path (data for hold, clock for setup) by (1 − derate), e.g., 0.95. - **Late Derate**: Multiply delays on the "late" path (data for setup, clock for hold) by (1 + derate), e.g., 1.05. - Typical OCV derate: **3–10%** depending on process node and path type. - **Effect on Setup**: The launching clock and data path use late (slower) delays. The capturing clock path uses early (faster) delays. This models the worst case where data arrives late while the capturing clock arrives early. - **Effect on Hold**: The opposite — launching path is early, capturing path is late. Models the case where data arrives too quickly while the capturing clock is late. **OCV Derate Application** - **Flat OCV**: Apply uniform derate to all cells — simple but overly pessimistic, especially for long paths where variations statistically average out. - **AOCV (Advanced OCV)**: Depth-aware derating — longer paths get smaller derates because more stages provide statistical averaging. - **POCV (Parametric OCV)**: Path-based statistical derating — most accurate, uses per-cell variation data. OCV is the **bridge between idealized corner-based analysis and real silicon behavior** — it ensures that within-die variation doesn't create timing surprises that only appear in manufactured chips.