opc

**Optical Proximity Correction (OPC)** is the **computational lithography technique that pre-distorts mask patterns to compensate for optical diffraction effects** — modifying photomask shapes so that the printed wafer pattern matches the intended design, essential for manufacturing any semiconductor device at 130nm and below. **What Is OPC?** - **Problem**: Optical diffraction causes printed patterns to differ from mask patterns. - **Solution**: Intentionally distort mask shapes to compensate for optical effects. - **Result**: Wafer patterns match design intent despite sub-wavelength printing. - **Necessity**: Required at all nodes where feature size < exposure wavelength. **Why OPC Matters** - **Pattern Fidelity**: Without OPC, corners round, lines shorten, spaces narrow. - **Yield**: OPC errors directly cause systematic yield loss. - **Node Enablement**: Advanced nodes impossible without aggressive OPC. - **Design Freedom**: Allows designers to use features smaller than wavelength. **Types of OPC** **Rule-Based OPC**: - **Method**: Apply geometric corrections based on lookup tables. - **Examples**: Line end extensions, corner serifs, bias adjustments. - **Speed**: Fast, simple implementation. - **Limitation**: Cannot handle complex 2D interactions. **Model-Based OPC (MBOPC)**: - **Method**: Iterative simulation-based correction using optical/resist models. - **Process**: Simulate → Compare to target → Adjust edges → Repeat. - **Accuracy**: Handles complex pattern interactions. - **Standard**: Industry standard for advanced nodes. **Inverse Lithography Technology (ILT)**: - **Method**: Treat mask optimization as mathematical inverse problem. - **Result**: Curvilinear mask shapes for optimal wafer printing. - **Quality**: Best pattern fidelity achievable. - **Challenge**: Requires curvilinear mask writing (multi-beam). **Key Concepts** - **Edge Placement Error (EPE)**: Difference between target and simulated edge position. - **Process Window**: Range of focus/dose where pattern prints successfully. - **MEEF**: Mask Error Enhancement Factor — how mask errors amplify on wafer. - **Fragmentation**: Dividing mask edges into movable segments for correction. **Tools**: Synopsys (Proteus), Siemens EDA (Calibre), ASML (Tachyon). OPC is **the cornerstone of computational lithography** — enabling semiconductor manufacturing to print features 4-5x smaller than the light wavelength used, making modern chip density physically possible.