opc optical proximity correction

**Optical Proximity Correction (OPC)** is the **computational lithography technique that pre-distorts photomask patterns to compensate for the systematic distortions introduced by optical diffraction, resist chemistry, and etch transfer — adding serifs (corner additions), anti-serifs (corner subtractions), assist features (sub-resolution patterns), and biasing (width adjustments) to the drawn layout so that the printed wafer pattern matches the designer's intent, where modern OPC requires solving inverse electromagnetic and chemical problems on billions of features per chip**. **Why OPC Is Necessary** Optical lithography at 193nm wavelength printing 30-50nm features operates at a k₁ factor of 0.08-0.13 — far below the Rayleigh resolution limit. At these conditions, the aerial image (light intensity pattern projected onto the wafer) is severely degraded: corners round off, line ends pull back, dense lines print at different dimensions than isolated lines, and narrow gaps between features may not resolve at all. Without OPC, the printed patterns would be unusable. **OPC Techniques** - **Rule-Based OPC**: Applies fixed geometric corrections based on lookup tables. For each feature type and context (pitch, width, neighbor distance), a pre-computed bias is applied. Fast but limited to simple corrections. Used for non-critical layers. - **Model-Based OPC**: Simulates the complete lithography process (optical, resist, etch) for each feature and iteratively adjusts the mask pattern until the simulated wafer image matches the target. Uses a calibrated lithography model that includes: - Optical model: Partial coherence imaging through the projection lens - Resist model: Acid diffusion, development kinetics - Etch model: Pattern-density-dependent etch bias Each feature is divided into edge segments that are independently moved (biased) to minimize the difference between simulated and target edges. - **Inverse Lithography Technology (ILT)**: Computes the mathematically optimal mask pattern that produces the desired wafer image — treating OPC as a formal inverse problem. ILT produces freeform curvilinear mask shapes that are globally optimal (vs. model-based OPC's locally optimal edges). ILT masks achieve tighter CDU and larger process windows but require multi-beam mask writers for fabrication. **Computational Scale** A modern SoC has ~10¹⁰ (10 billion) edge segments that must be corrected. Each correction requires 10-50 lithography simulations. Total: 10¹¹-10¹² simulation evaluations per mask layer. OPC for one layer of a leading-edge chip requires 10-100 hours of compute on clusters with thousands of CPU cores. Full chip OPC for all 80+ mask layers represents one of the largest computational workloads in engineering. **OPC Verification** After OPC, the corrected mask data is verified by running a full-chip lithography simulation and checking that every printed feature meets specifications (CD within tolerance, no bridging, no pinching, sufficient overlap at connections). Any failing sites require re-correction or design fixes. Optical Proximity Correction is **the computational magic that makes impossible lithography possible** — transforming mask shapes into unrecognizable pre-distortions that, after passing through the blur of sub-wavelength optics and the nonlinearity of resist chemistry, produce the precise nanometer-scale patterns that designers intended.