Planar Process 1959 Enables Monolithic Integration Noyce

# Why a Flat, Oxide-Covered Surface Makes More Than One Transistor Per Chip Possible

## 1. Why Noyce Needed Exactly What This Series Had Just Finished Building

This step is not a new fabrication operation; it is the recognition, by Robert Noyce at Fairchild in 1959, that the planar surface this series has built — flat, oxide-covered, carrying its own patterned metal interconnect since Step 6 — solves a problem Kilby's germanium integrated circuit never had to solve, because Kilby wired his components together with individual fine wires rather than a patterned metal layer on a continuous chip. The 1958 series' own context article at its Step 13 framed the tyranny of numbers as a crisis of connection count, with reliability falling as $(1-p)^{N}$ against the number of joints a circuit needs. Kilby's monolithic circuit reduced that count by eliminating the connections *between separately packaged components*; it did nothing for the connections *within* a single piece of semiconductor, because his circuit still relied on individually placed wires inside the device itself. This series' planar surface eliminates that remaining category of joint entirely, by letting the same photolithographically patterned metal from Step 6 route between multiple devices on one chip with no discrete joint at all:

$$R_{\text{planar IC}} = (1-p)^{N_{\text{external}}}, \qquad N_{\text{internal}} \to 0$$

where $N_{\text{external}}$ is the handful of connections a finished chip still needs to the outside world, and $N_{\text{internal}}$, the count of connections between components sharing the chip, collapses toward zero because those connections are now continuous metal traces rather than discrete wires. This is precisely the term Kilby's device could not remove, because his components were not sharing a single patterned metal layer the way this series' interconnect, defined in Step 6, now allows.

The Last Category of Joint, Finally Removed kilby removed the joints between packages; planar removes the joints within a chip THREE ERAS OF CONNECTION COUNT DISCRETE CIRCUIT every link a soldered joint KILBY, 1958 one chip, wires still link components NOYCE, PLANAR, 1959 continuous metal, no joint at all Rplanar IC = (1−p)N external, Ninternal → 0 — the last joint category kilby's device still carried this is the step where 1958's reliability crisis and this series' own crisis converge on one answer

## 2. Real Diagram: Two Transistors, One Chip, No Wire Between Them

Because each transistor's junctions stay covered under oxide, two or more of them can sit close together on the same piece of silicon with field oxide standing between their active regions, and the metal interconnect from Step 6 can route directly from one device's contact to another's without ever leaving the chip or needing a discrete wire.

Two Devices, One Chip, One Continuous Trace field oxide isolates them; patterned metal connects them, without ever leaving the surface transistor A transistor B continuous metal trace, no joint the same oxide keeping each junction covered keeps these two devices apart until the metal decides otherwise

## 3. Why Kilby's Circuit Could Not Have Done This, and This Series Could Not Have Done It Before Step 6

The 1958 series' own closing context article made the comparison carefully: Kilby's device solved the connection problem *between* separately housed components, and would have carried this series' own exposed-junction vulnerability, multiplied by however many transistors sat on his germanium, had he tried to build more than one. This series' planar surface was never built with multi-device integration in mind — Step 1 removed the mesa etch to protect a single junction, and Step 6 patterned metal to wire a single transistor to the outside world. But a surface that keeps one junction covered keeps every junction covered, and a metal layer that can route one contact to a pad can just as easily route one device's contact to another device's contact on the same chip. Noyce's contribution was not a new fabrication step; it was noticing, the way Hoerni noticed in Step 2, that this series' own geometry already contained the answer to a problem a different team at the same company was still trying to solve by hand.

Step 9 does not change anything this series has already built; it is the moment this series' quiet, single-device reliability fix turns out to double as the missing half of Kilby's integrated circuit.

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