Planar Ic Junction Isolation Step 12 Recognize the Parasitic Four Layer

# Recognize the Parasitic Four-Layer Structure Junction Isolation Creates Between Neighbors

## 1. Why Two Isolated Islands Can Hide an Unintended Thyristor Between Them

An isolated island built around an NPN transistor typically needs a p-type base, an n-type collector, and the p-type isolation region surrounding it, plus the n-type substrate or buried layer beneath — and that specific sequence of alternating layers, n then p then n then p or its mirror, is exactly the four-layer structure that defines a PNPN thyristor, formed here unintentionally, by the very geometry junction isolation requires, not by any device the circuit diagram asked for. Under normal bias this parasitic structure sits dormant, its junctions biased in a way that keeps it from conducting; but if a transient or a fault condition forward-biases the right junction pair long enough to inject carriers that the adjacent junction then collects and amplifies, the structure can turn on and latch into a low-impedance conducting state that the circuit's own operating bias, by itself, may not be able to turn back off:

$$\alpha_{npn} \cdot \alpha_{pnp} \geq 1 \Rightarrow \text{regenerative turn-on}, \qquad I_{\text{latched}} \text{ persists until external bias is interrupted}$$

where $\alpha_{npn}$ and $\alpha_{pnp}$ are the current gains of the two parasitic bipolar transistors the four-layer structure implicitly contains, and their product crossing unity is the same regenerative condition that makes any thyristor, intentional or not, stay on once triggered.

Four Alternating Layers, an Unintended Thyristor device base, collector, isolation region, and substrate form the same sequence a thyristor needs n, device collector p, device base p, isolation region n, substrate or buried layer nppn alpha npn times alpha pnp at or above 1 triggers a regenerative, self sustaining turn on no one designed this thyristor; the isolation geometry built it anyway

## 2. Real Diagram: The Two Hidden Bipolar Transistors Sharing the Isolation Structure

The four alternating layers can be read, equivalently, as two bipolar transistors wired back to back, an NPN formed from the device's own collector-base-isolation stack and a PNP formed from the base-isolation-substrate stack, each one's collector feeding the other's base — the specific feedback topology that makes a thyristor regenerative once triggered.

Two Parasitic Bipolar Transistors, Wired Into a Feedback Loop each transistor's collector feeds the other's base, the regenerative condition itself PARASITIC NPN collector, base, isolation PARASITIC PNP base, isolation, substrate collector to base, each direction, the loop that sustains itself once triggered this loop exists in the structure whether or not the circuit ever intends to use it

## 3. Why This Risk Is Inherent to the Isolation Geometry, Not a Defect of Any One Layout

This parasitic structure is not a mistake a careful layout avoids by choosing better dimensions; it is an unavoidable consequence of using a p-type isolation region to separate n-type device regions from an n-type substrate, which necessarily produces the alternating-layer sequence a thyristor needs, somewhere in the chip, at every isolation boundary surrounding an NPN island. What a careful layout can control is how easily that structure gets triggered and how much current it can sustain once triggered — questions this series' discipline around bias margin and substrate-tie strength, established in Steps 5 through 7, exists partly to answer.

Step 12 names a parasitic device junction isolation builds by necessity, present at every boundary this architecture creates, whether or not any circuit ever means to use it.

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