rapid thermal anneal
**Rapid Thermal and Millisecond Annealing** are the **thermal processing techniques that deliver precisely controlled heating to activate implanted dopants and repair crystal damage while minimizing unwanted dopant diffusion**, spanning a range from seconds (RTA/spike anneal) to milliseconds (flash anneal) to microseconds (laser anneal) — with the tradeoff between activation completeness and diffusion control defining the process window at each technology node.
**Anneal Technology Spectrum**:
| Technique | Time at Peak | Peak Temperature | Heating Method | Diffusion |
|----------|-------------|-----------------|---------------|----------|
| Furnace anneal | 10-60 min | 800-1000°C | Resistive + convection | Very high |
| RTA (ramp-up/down) | 1-60 sec | 900-1100°C | Halogen lamps | High |
| **Spike anneal** | ~1 sec at peak | 1000-1100°C | Halogen lamps, fast ramp | Moderate |
| **Flash (millisecond)** | 0.1-10 ms | 1100-1350°C | Flash lamp discharge | Very low |
| **Laser anneal (μs)** | 0.1-100 μs | 1200-1400°C | Pulsed/CW laser | Minimal |
| **Laser melt anneal** | <1 μs | >1400°C (melting) | Pulsed excimer laser | Near zero (amorphous) |
**Spike Anneal** (current production workhorse): Uses a bank of tungsten-halogen lamps to heat the wafer at 150-250°C/s ramp rate to peak temperature (typically 1000-1080°C), hold for <1 second, then cool at ~80°C/s. The brief time at peak minimizes dopant diffusion while achieving >95% electrical activation of implanted species. Chamber atmosphere is N₂ or Ar to prevent oxidation.
**Millisecond Anneal (Flash/FLA)**: An array of xenon flash lamps discharges in ~1-10 ms, rapidly heating the wafer surface to 1100-1350°C while the bulk remains at a lower "assist" temperature (600-800°C, maintained by steady-state lamps). The thermal gradient between surface and bulk provides the cooling mechanism — heat is conducted into the wafer bulk after the flash. This achieves near-complete dopant activation with 5-10× less diffusion than spike anneal.
**Laser Anneal**: Scanned laser beams (CO₂ at 10.6μm for non-melt, excimer at 308nm for melt) heat only the top surface layer. Non-melt laser anneal heats to just below the silicon melting point (1414°C) for microseconds, achieving very high activation. Melt anneal briefly liquefies the surface layer, and the recrystallization front sweeps from the underlying crystal seed, creating defect-free, fully activated junctions. The liquid phase has 8 orders of magnitude higher dopant diffusivity, but the sub-microsecond duration keeps the profile sharp.
**Why Multiple Techniques Coexist**: Different process steps have different requirements: **gate stack anneal** — needs lower temperature to avoid high-k crystallization (spike anneal at 900-1000°C); **deep S/D anneal** — moderate activation, moderate diffusion OK (spike at 1050°C); **S/D extension anneal** — maximum activation, minimum diffusion (flash or laser at 1200°C+); **contact doping activation** — near-surface, very shallow (laser anneal). A complete CMOS process flow may use 3-5 different anneal steps with different techniques.
**Rapid thermal and millisecond annealing technologies embody the fundamental tension in CMOS fabrication — the need to fully activate dopants (requiring high temperature) while preventing their diffusion beyond the designed junction depth (requiring short time), with each technology generation demanding ever more extreme thermal processing conditions.**