ruthenium

**Ruthenium Metal Fill for Advanced Interconnects** is the **use of ruthenium (deposited via ALD) as a fill metal for narrow vias and interconnects — offering significantly lower resistivity at small dimensions (11 µΩ·cm at 5 nm vs W at 35 µΩ·cm) — and enabling reduced RC delay and improved electromigration performance at 5 nm nodes and below**. Ru represents a paradigm shift in interconnect fill materials. **Low Resistivity at Nanoscale** Tungsten (W) has intrinsic resistivity ~5 µΩ·cm bulk but increases dramatically at small cross-sections due to grain boundary scattering and surface scattering. At 5 nm line width, W resistivity can increase 5-7x to ~35 µΩ·cm. Ruthenium has inherently lower resistivity (~7 µΩ·cm bulk) and, crucially, maintains near-bulk resistivity even at 5 nm dimensions (~11 µΩ·cm). This 3x advantage reduces interconnect RC delay and power consumption. **ALD Deposition Process** Ru is deposited via ALD from ruthenium precursors (e.g., bis(cyclopentadienyl)ruthenium, RuCp₂) with H₂ reducing agent or O₂/H₂ alternating pulses. ALD provides excellent conformality and thickness control, critical for filling high-aspect-ratio vias (AR > 10:1). Bottom-up fill growth ensures void-free fill without aggressive overburden etch (needed for W). Deposition temperature is 200-300°C (lower than W CVD at 350-400°C), reducing thermal budget and enabling integration with lower-Tg dielectrics. **Barrier-Free Integration** Unlike W and Cu, Ru does not require a separate diffusion barrier (e.g., TiN) — Ru directly adheres to SiO₂ and can serve as a self-barrier. This eliminates the barrier layer (10-20 nm TiN), directly reducing via resistance and improving fill efficiency. Ru nucleates readily on oxide surfaces, enabling conformal ALD without nucleation delay. This barrier-free approach is transformative for aggressive via scaling. **Electromigration Performance** Ru exhibits superior EM resistance compared to W, with higher Blech length (minimum length immunity to EM) and higher effective activation energy. The material's FCC crystal structure and atomic mass (101.1 vs W at 183.8) contribute to better EM behavior. Via-level EM is less critical than line-level EM, but Ru's advantage still improves reliability margin and enables higher current densities (>2 MA/cm² at 85°C). **Selective Deposition** Ru can be deposited selectively on previously patterned surfaces (e.g., TiN or other metals) without nucleation on SiO₂ or other dielectrics through careful precursor selection and temperature control. This enables direct via fill without protecting dielectrics, simplifying process flow. Selectivity is particularly valuable for dual-inlayer (DI) schemes where selective Ru fill eliminates excess polishing. **Integration with EUV Patterning** Ru fill is ideal for EUV-patterned vias: tight via CD (20-30 nm), high AR, and EUV resist residue can challenge W fill. Ru ALD's conformality and low-temperature deposition minimize defects and residue interaction. EUV-Ru integration has been demonstrated at multiple foundries as a path to sub-5 nm interconnect. **Challenges and Adhesion** While Ru adhesion to SiO₂ and TiN is generally good, adhesion to low-k dielectrics and porous materials can be problematic. Surface preparation (HF or Ar plasma clean) is critical. Ru's lower elastic modulus (~400 GPa vs W at ~410 GPa) makes it slightly softer, potentially affecting CMP planarization. Post-deposition annealing or capping may be needed to enhance adhesion and prevent voiding during service. **Summary** Ruthenium fill represents a critical innovation in interconnect technology for 3 nm and below, addressing resistivity scaling limitations of tungsten. Its low resistivity, barrier-free integration, and superior EM performance position Ru as the preferred via fill material for the foreseeable future.