scalloping

Scalloping is sidewall roughness resulting from the cyclic etch-passivation nature of the Bosch process used in deep silicon etching. **Bosch process**: Alternates between SF6 isotropic etch and C4F8 passivation deposition steps. Each cycle etches a small increment. **Formation**: Each etch step undercuts slightly beneath the passivation layer, creating a scallop-shaped indentation. Repeated cycles create periodic wavy sidewalls. **Dimensions**: Scallop depth typically 50-500nm. Period matches etch cycle time (typically 5-15 seconds per cycle). **Impact**: Surface roughness affects device performance if sidewalls are functional surfaces (MEMS, photonics, TSVs). **Reduction strategies**: Shorter cycle times reduce scallop size but slow etch rate. Ramped or tuned parameters can minimize scallop depth. **Alternative processes**: Cryogenic etching (continuous etch at low temperature) produces smooth sidewalls without scalloping. **Smoothing**: Post-etch oxidation and oxide strip can reduce scallop depth. Hydrogen annealing smooths silicon surfaces. **Applications**: Deep trench etching, TSVs, MEMS structures where Bosch process is preferred for high AR. **Trade-offs**: Scallop reduction often conflicts with etch rate and selectivity optimization. **Metrology**: Cross-section SEM quantifies scallop depth and periodicity.