Semi E43
SEMI E43 defines Electrostatic Measurements on Objects and Surfaces, the standard test method for quantifying static electrical charge on wafers, carriers, and equipment surfaces — voltage potential, decay rate, and charge polarity — so a fab can verify that its static-control measures are actually working rather than assuming they are because an ESD mat or ionizer was installed. Static charge accumulates on nearly every surface inside a fab through ordinary friction and separation events — a wafer sliding out of a carrier, a robot end-effector releasing a substrate — and without a standardized way to measure the resulting charge, there's no way to confirm whether a tool's static-control hardware is adequately dissipating it or merely present without actually working.
E43's decay-rate measurement is often the more operationally important of the two numbers: a surface might show an acceptable peak voltage reading immediately after a charging event but take far longer than expected to actually dissipate that charge, meaning wafers handled during the slow-decay window are still exposed to a static-discharge risk even though the hardware is nominally functioning — a risk a simple pass/fail voltage check at one instant in time would completely miss. This matters directly for gate-oxide integrity and particle attraction: a charged wafer surface both risks electrostatic discharge damage to sensitive device structures and actively attracts particles electrostatically, which is why E43's quantified, repeatable measurement method exists — to give a fab a verifiable number for static-control performance instead of treating ESD mitigation as a checkbox satisfied by equipment installation alone.
E43's static-charge measurement discipline connects directly to the contamination picture SEMI E14 and E44 cover: a charged surface doesn't just risk electrostatic discharge damage, it actively attracts the particles E14 measures a tool contributing and the particles E44's minienvironment acceptance testing is meant to keep away from the wafer in the first place.