semiconductor equipment
**Semiconductor equipment is the collection of precision machines that repeatedly patterns, deposits, removes, modifies, cleans, and measures material to manufacture integrated circuits.** A leading-edge wafer may visit hundreds of process chambers and metrology stations over several months. Each tool must control nanometer-scale geometry, atomic-scale films, particles, plasma chemistry, temperature, and wafer handling while maintaining high throughput and availability. Equipment capability therefore sets what a chip designer can fabricate.
**The market is a strategic industry of roughly 100 billion USD per year, with unusually concentrated suppliers.** ASML is the sole production supplier of EUV scanners. Applied Materials, Lam Research, Tokyo Electron, KLA, ASM International, SCREEN, Hitachi High-Tech, Canon, Nikon, and specialist firms dominate particular process steps. A tool contains optics, vacuum systems, robots, RF generators, lasers, sensors, software, and thousands of sourced parts; disruption at one specialized supplier can constrain global fab output.
| Process step | What the equipment does | Major suppliers and specialties | Critical control variable |
|---|---|---|---|
| Lithography | Projects or writes resist patterns | ASML EUV/DUV; Nikon and Canon DUV | Overlay, focus, dose, imaging contrast |
| Deposition | Adds dielectric, metal, or semiconductor films | Applied, Lam, TEL, ASM, Kokusai | Thickness, composition, conformity, particles |
| Etch | Selectively removes patterned material | Lam, TEL, Applied, Hitachi | Profile, selectivity, uniformity, damage |
| CMP | Planarizes films with pad and slurry | Applied, Ebara; consumable ecosystem | Removal rate, dishing, erosion, defects |
| Implant and anneal | Introduces and activates dopants | Axcelis, Applied; laser/thermal specialists | Dose, energy, activation, diffusion |
| Metrology/inspection | Measures dimensions and detects defects | KLA, Applied, Hitachi, Onto | Sensitivity, sampling, false detections |
**Lithography scanners are among the most complex machines ever industrialized.** EUV uses 13.5 nm light generated when a high-power laser strikes tin droplets. Multilayer mirrors guide the light through a reflective mask and projection optics in vacuum. A high-NA or conventional EUV platform integrates more than 100,000 parts, weighs tens of tons, and may cost around 200 million USD or more depending on configuration. Throughput, availability, overlay, resist behavior, and mask defects determine its economic value.
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**Deposition tools build films one controlled layer at a time.** Chemical vapor deposition uses reactive gases; physical vapor deposition ejects material from a target; atomic layer deposition alternates self-limiting surface reactions for angstrom-scale control; epitaxy extends crystalline material. High-aspect-ratio structures demand conformality deep inside trenches. Selective deposition aims to grow only on intended surfaces, potentially reducing patterning steps. Chamber seasoning and precursor delivery are as important as nominal chemistry.
**Etch tools transfer resist patterns into functional materials.** Plasma creates ions and radicals that combine directionality with chemical selectivity. Gate stacks, contacts, NAND memory channels, and interconnect vias require different reactors. Engineers control pressure, gas mix, RF power, bias, temperature, and endpoint. The challenge is maintaining profile and critical dimension across a 300 mm wafer without damaging underlying films or leaving residues.
**CMP restores a flat surface for the next lithography step.** A rotating pad and chemically active slurry remove raised material. Pad condition, pressure, speed, slurry flow, and wafer carrier zones tune removal. Poor control produces scratches, particles, dishing of metal, or erosion of dense patterns. Pads and slurries are recurring consumables, making process stability and supply consistency important to ownership cost.
**Metrology and inspection determine whether the process is still on target.** Optical and electron-beam systems measure critical dimension, overlay, film thickness, composition, topography, and defects. Inspection must find yield-relevant particles and pattern failures among billions of features while avoiding overwhelming false alarms. Sampling is unavoidable because exhaustive measurement would be too slow, so fabs combine fast broad inspection with slower high-resolution review.
**Ion implantation, thermal processing, and cleaning modify material properties.** Implanters accelerate dopant ions at controlled dose and energy. Furnaces, rapid thermal systems, and laser anneals activate dopants, repair damage, or grow films while limiting diffusion. Wet benches and single-wafer cleans remove particles, organics, metals, oxides, and residues. Seemingly simple cleaning steps can determine interface quality and device reliability.
**Automation keeps humans and contamination away from wafers.** Front-opening unified pods carry lots between tools through overhead transport. Equipment front-end modules identify wafers, align them, and transfer them through load locks. Factory software schedules lots, recipes, qualifications, maintenance, and holds. Interface standards let equipment report status and data, but recipe governance prevents the wrong product from entering an incompatible chamber.
**Availability is productive time, not merely powered-on time.** Preventive maintenance replaces consumables and cleans chambers before drift or failure. Unplanned downtime can idle dependent tools and strand work in process. Fabs track mean time between failures, repair time, qualification wafers, chamber matching, and overall equipment effectiveness. Redundant chambers add capacity but only if their process signatures are matched closely enough to share products.
**Cost of ownership combines capital, throughput, yield, uptime, labor, facilities, and consumables.** A cheaper tool may be expensive per good wafer if it is slow or creates subtle defects. EUV can replace several DUV multi-patterning steps, so scanner price alone is not the correct comparison. Recipe time, wafer starts per hour, maintenance frequency, energy, gases, spare parts, and floor space enter factory planning.
**Equipment development is intertwined with process development.** Tool vendors work with foundries, materials suppliers, mask shops, research institutes, and chip customers years before a node enters volume. Test wafers expose interactions among films, structures, and pattern density. A process window must remain manufacturable across chambers, lots, fabs, and maintenance cycles—not just produce one excellent demonstration wafer.
**Export controls and geographic concentration make equipment strategic.** Advanced scanners, etch, deposition, inspection, and design know-how can constrain which nodes a region can manufacture. Suppliers must manage thousands of specialized parts and global service teams. Fabs require long-lived support because a tool may run for decades. Spare inventories, local training, cybersecurity, and second-source strategies influence national and corporate resilience.
**The equipment roadmap follows structures that are becoming smaller, taller, and more three-dimensional.** Gate-all-around transistors require selective removal and inner-spacer control; advanced memory requires extreme aspect ratios; backside power and chiplet packaging introduce new bonding, thinning, and inspection steps. Progress comes from machines that can manipulate and measure matter with tighter control while remaining fast, clean, repeatable, and serviceable in high-volume production.