semiconductor laser anneal
**Semiconductor Laser Annealing** is the **ultra-rapid thermal processing technique that uses high-power laser pulses to heat the wafer surface to 1000-1400°C for milliseconds or microseconds** — activating implanted dopants with near-100% efficiency while maintaining ultrasharp dopant profiles because the heating is so brief that dopant diffusion is negligible, critical for sub-5nm nodes where junction depths of 5-10 nm must be formed without any profile broadening.
**Why Laser Annealing**
- Ion implantation creates crystal damage and dopants are not electrically active.
- Annealing needed to: (1) repair crystal damage, (2) activate dopants (move to lattice sites).
- Conventional RTA (Rapid Thermal Anneal): 1000-1100°C for 1-10 seconds → dopants diffuse 5-20 nm.
- Laser anneal: 1200-1400°C for 0.1-1 ms → near-zero diffusion, >99% activation.
**Annealing Technology Comparison**
| Technology | Temperature | Duration | Dopant Diffusion | Activation |
|-----------|------------|----------|-----------------|------------|
| Furnace anneal | 800-1000°C | 30-60 min | 50-200 nm | 40-60% |
| Spike RTA | 1000-1100°C | ~1 sec | 5-20 nm | 70-90% |
| Flash lamp anneal | 1100-1300°C | 1-5 ms | 1-5 nm | 90-98% |
| Laser spike anneal (LSA) | 1200-1400°C | 0.1-1 ms | <1 nm | >99% |
| Nanosecond laser anneal | Melt temperature | 10-100 ns | ~0 nm | ~100% |
**Laser Anneal Process**
```
[CO₂ laser beam (10.6 µm) or diode laser array]
↓
[Scanned across wafer surface at ~100-300 mm/s]
↓
[Surface heated to 1200-1400°C in <1 ms]
↓
[Substrate remains at ~400-500°C (thermal sink)]
↓
[Surface cools in ~1 ms as beam moves on]
Key: Only top ~10 µm is heated → underlying structures preserved
```
**Temperature Profile**
```svg
```
- Peak temperature: 1200-1400°C (above silicon's normal processing limit).
- Duration at peak: <1 ms → thermal budget is tiny.
- Result: Crystal is repaired, dopants are activated, but no time for diffusion.
**Applications**
| Application | Benefit of Laser Anneal |
|------------|------------------------|
| Source/drain activation | Ultra-shallow junctions (5-8 nm) with high activation |
| Contact resistance reduction | Higher active doping → lower R_contact |
| Strain engineering | Activate SiGe S/D without relaxing strain |
| 3D stacking | Low thermal impact on lower layers |
| BEOL anneal | Can anneal top layers without damaging metal interconnects |
**Nanosecond Laser Anneal (Melt Anneal)**
- Excimer laser (308 nm) or green laser (532 nm): Pulses of 10-100 ns.
- Surface melts and resolidifies in nanoseconds → liquid-phase epitaxial regrowth.
- Ultra-high activation: Metastable supersaturated solid solutions possible.
- Used for: Contact layers, amorphized regions, advanced junctions.
**Challenges**
| Challenge | Issue | Mitigation |
|-----------|-------|------------|
| Pattern density effect | Different structures absorb differently | Absorber layers, tuned wavelength |
| Temperature measurement | <1 ms duration → hard to measure T | Emissivity models, pyrometry |
| Wafer stress | Rapid thermal gradient → potential slip | Controlled ramp, back-side heating |
| Throughput | Scan entire 300mm wafer | Multi-beam, wide line beams |
Semiconductor laser annealing is **the thermal processing breakthrough that decoupled dopant activation from dopant diffusion** — by achieving temperatures high enough for complete activation in timeframes too short for diffusion, laser annealing enables the ultra-shallow, heavily-doped junctions that make sub-5nm transistors possible, representing one of the most critical process innovations in advanced CMOS manufacturing.