semiconductor metrology
**Semiconductor Metrology** is the **science of precise measurement of critical dimensions, film thicknesses, overlay alignment, and material properties on semiconductor wafers** — providing the quantitative feedback that controls every process step and ensures that billions of transistors on a chip are manufactured within nanometer-scale tolerances required for proper electrical function.
**Key Metrology Measurements**
| Parameter | What It Measures | Tool | Precision |
|-----------|-----------------|------|-----------|
| CD (Critical Dimension) | Line/space width | CD-SEM, scatterometry | < 0.5 nm |
| Overlay | Layer-to-layer alignment | Overlay tool | < 1 nm |
| Film Thickness | Deposited layer thickness | Ellipsometry, XRF | < 0.1 nm |
| Defect Detection | Particles, pattern defects | Inspection (KLA) | > 20 nm defects |
| Composition | Material stoichiometry | XPS, SIMS | Atomic-level |
**CD-SEM (Critical Dimension Scanning Electron Microscope)**
- Electron beam scans feature edges → secondary electron signal maps edge positions.
- Resolution: < 1 nm measurement precision on features as small as 5 nm.
- Throughput: 10-50 measurements per minute (relatively slow).
- Challenge: E-beam can damage photoresist and cause shrinkage — low beam current required.
**Overlay Metrology**
- Measures misalignment between lithography layers.
- At 3nm node: Overlay budget < 2 nm total.
- Image-based overlay (IBO): Optical microscope reads overlay targets (box-in-box patterns).
- Diffraction-based overlay (DBO): More accurate — measures diffraction from grating targets.
- Inline measurement: Every wafer measured at multiple sites → feedback to scanner for correction.
**Scatterometry / OCD**
- Optical technique: Shine broadband light on periodic structure → measure diffraction spectrum.
- Compare measured spectrum to library of simulated spectra → extract dimensions (CD, height, sidewall angle).
- Advantage: Non-destructive, fast (seconds per site), measures 3D profile.
- Limitation: Requires periodic structures — can't measure random logic directly.
**Advanced Metrology Challenges**
- **3D structures**: FinFET fins, GAA nanosheets — need measurements in multiple dimensions.
- **Buried features**: Measurements through overlying layers — requires X-ray or tilted-beam techniques.
- **HAR (High Aspect Ratio)**: 3D NAND with 200+ layers — optical methods can't reach bottom.
- **EUV-specific**: Stochastic defects at EUV scale require new detection methods.
Semiconductor metrology is **the eyes of the fab** — without sub-nanometer measurement precision, process engineers would be flying blind, unable to control the dimensions and alignment that determine whether a chip worth millions of dollars in development functions correctly.