signal integrity

**Signal Integrity / Crosstalk** — the challenge of maintaining clean, accurate signal waveforms as wires run close together at high speeds, where electromagnetic coupling between adjacent wires can cause timing failures. **Crosstalk Mechanisms** - **Capacitive coupling**: Electric field between adjacent parallel wires. Dominant at advanced nodes - **Inductive coupling**: Magnetic field from current loops. Important at high frequencies (>1GHz) - When aggressor wire switches, it induces voltage on quiet victim wire **Effects** - **Crosstalk delay**: Aggressor and victim switching in opposite directions → victim slows down (setup violation risk) - **Crosstalk speedup**: Same-direction switching → victim speeds up (hold violation risk) - **Functional noise**: Coupling pulse exceeds noise margin → victim flips to wrong logic value (functional failure) **Factors That Worsen Crosstalk** - Long parallel wire runs - Tight wire spacing (wire-to-wire < wire width at advanced nodes) - Fast aggressor transition (high slew rate) - High-impedance (weakly driven) victim **Mitigation** - **Shielding**: Insert ground/VDD wires between sensitive signals - **Spacing**: Increase distance between coupled wires (costs routing resources) - **Buffer insertion**: Break long parallel runs with repeaters - **Net ordering**: Route non-interacting signals adjacent to each other **Crosstalk analysis** is part of signoff STA — tools calculate coupling-aware delays for all critical paths. A chip cannot tape out until crosstalk effects are accounted for.