soi technology

**SOI (Silicon on Insulator)** — a wafer technology where a thin silicon device layer sits on top of a buried oxide (BOX) insulator, providing reduced parasitics and better transistor control. **Structure** ``` [Thin Si device layer (5-50nm)] [Buried Oxide - BOX (10-200nm)] [Bulk Si substrate] ``` **Advantages over Bulk Silicon** - Reduced junction capacitance (source/drain sit on insulator, not bulk silicon) - Better isolation between transistors - Reduced latch-up susceptibility - Radiation hardness (important for space/military) **Types** - **PD-SOI (Partially Depleted)**: Thicker Si layer. Some bulk-like behavior. Floating body effects can cause issues - **FD-SOI (Fully Depleted)**: Very thin Si layer (<10nm). Fully depleted channel. Excellent electrostatic control **FD-SOI Advantages** - **Back-gate biasing**: Apply voltage to substrate to dynamically adjust $V_{th}$. Can trade speed for power in real-time - Simpler process than FinFET at equivalent performance - Lower cost at 22nm/12nm nodes - Providers: STMicroelectronics, GlobalFoundries (22FDX) **Applications** - IoT and wearables (ultra-low power with back-biasing) - Automotive (radiation tolerance) - RF/5G (excellent analog characteristics) **SOI** offers a different scaling path from FinFET — it trades slightly lower performance for lower power, lower cost, and unique back-biasing capability.