Split Manufacturing

Split manufacturing protects a chip's design by physically separating where its two halves get fabricated — the front-end transistor layers go to a high-security, often domestically trusted foundry, while the back-end metal wiring layers go to a lower-trust, typically cheaper offshore facility that never receives enough information to reconstruct the complete design. Neither facility alone ever sees the whole chip: the trusted fab knows exactly what transistors it built but has no idea how they're ultimately wired together, and the untrusted fab wires up a pattern of connections without ever being told what circuit those connections actually form.

This works specifically because the backend layers are exactly the part this site covers in its own backend process flow — ten to fifteen levels of copper interconnect that decide how already-finished transistors connect to each other. An untrusted foundry that only receives this backend work sees a dense pattern of vias and metal traces without any accompanying record of which transistor each trace actually belongs to or what logical function the resulting circuit performs, so even a foundry employee with full access to their own fabrication data can't reverse-engineer the chip's actual behavior from wiring geometry alone — stealing the design would require also reconstructing exactly what the front-end facility built, information that facility never shares.

The security benefit comes at a real, unavoidable engineering cost. Splitting fabrication means the design has to tolerate two separate wafer lots traveling between two different facilities, with all the logistics, scheduling, and alignment risk that introduces, and the technique only protects against a foundry trying to steal or tamper with the design — it does nothing against an attacker who compromises the design house itself before the split ever happens, so split manufacturing is deliberately layered alongside other defenses like logic locking rather than treated as a complete solution on its own.

Academic research on split manufacturing has spent years probing exactly how much the backend wiring alone can leak. Attacks that analyze the layout of the exposed back-end-of-line layers have shown that, with enough placement and routing information, some of the hidden front-end connectivity can sometimes be inferred statistically even without seeing the transistors directly — which has pushed defenders toward deliberately splitting at higher metal layers, obfuscating the layout of the trusted front-end's exposed interface, and combining the technique with logic locking so that even a successfully reconstructed netlist still needs the correct key to function.

Read split manufacturing through a *neither-half-is-the-whole-picture* lens rather than a *half-the-chip-is-safe* lens — the security doesn't come from either facility individually being trustworthy, it comes from deliberately making sure that no single facility, however carefully it inspects what passes through its own doors, ever holds enough of the design to reconstruct what the finished chip actually does.