Surface Barrier 1953 Grind or Lap the Slices

# Grind or Lap the Slices: Making Step Six's Ceiling One Number Across a Wafer Two Jets Will Later Attack From Opposite Sides

A sawn slice still wanders in thickness across its own area, exactly as it does in the alloy-junction route, and this step still corrects that the same way — removing material fastest wherever local pressure against the lapping plate is highest, converging the surface toward flat. What makes flatness and parallelism matter more here than in the alloy-junction route is what will happen to this wafer next: two opposing electrolyte jets will etch inward from both faces simultaneously, aimed at meeting in the middle. If the two faces are not parallel, the jets are not etching toward each other across a uniform gap — they are etching toward each other across a gap that itself varies with position, which this step exists to prevent.

## 1. Material Removal Still Follows the Same Pressure-Velocity Law

$$\frac{dt}{d\tau} = -k_p\, P\, v_{\text{rel}}$$

As in the alloy-junction route, lapping removes material at a rate set by local contact pressure $P$, relative sliding velocity $v_{\text{rel}}$, and a process constant $k_p$ — the same Preston-equation form, self-correcting because a high spot presses harder against the reference plate and wears faster. Nothing about this physical mechanism changes based on what will later happen to the wafer; it is a property of abrasive contact mechanics, indifferent to etching or alloying.

## 2. Real Diagram: Flatness Now Protects a Gap Two Jets Will Share

High Spots Still Wear Faster — Now Protecting a Shared Gap, Not a Firing Depth the same self-correcting mechanism as alloy-junction, aimed at a different downstream consequence lapping plate, reference flat rough-cut slice, before lapping high spot, faster removal lower spot, slower removal after lapping — flat, uniform thickness two jets will later etch toward each other across this exact surface, from opposite faces

## 3. A Wedge Now Costs a Jet-Etch Pair Something the Alloy-Junction Route Never Had to Worry About

$$t_{\text{slice}}(x, y) = t_0 \pm \Delta t_{\text{wedge}}(x, y)$$

As in the alloy-junction route, a wedge-shaped slice turns step six's ceiling equation, $W_B\approx t_{\text{slice}}-d_{\text{top}}-d_{\text{bottom}}$, from one number into a position-dependent map $t_{\text{slice}}(x,y)$ — but the consequence here is sharper, because this process's base width is set by two etch fronts advancing toward each other from both faces simultaneously, not by two independently-timed alloy firings that each only care about their own local junction depth. A thicker region of a wedge forces both jets to run longer, or run at a higher current, to reach the same eventual base width a thinner region reaches faster — meaning a single uncorrected wedge does not just shift the ceiling, it desynchronizes how long etching has to run across the wafer's own area, a timing problem the alloy-junction route's two separately-scheduled firings never had to solve.

Thickness Variation Now Desynchronizes an Etch, Not Just a Firing the goal is still a flat line — the stakes behind it have changed position across wafer → local thickness as-sawn — etch time would vary by position after lapping — one etch schedule works everywhere a flat line here means a single jet-etch recipe applies across the whole wafer, not a map of recipes

## Grind or Lap the Slices's Place in the Process Lineage

Grinding or lapping the slices is step seven of Philco's surface-barrier process, immediately after the germanium has been sliced and before machining damage is etched away — mechanically identical to the equivalent step in this project's alloy-junction series, using the same pressure-driven self-correcting removal mechanism. What this step protects differs: the alloy-junction route needs flatness so one ceiling number applies uniformly; this process needs flatness so one etch-time schedule applies uniformly to two jets advancing from opposite faces at once. Step eight, etching machining damage, inherits a wafer whose geometry this step has already made as close to a single number as the lapping process allows.

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