thermal-electrical co-simulation
**Thermal-electrical co-simulation** is the **coupled simulation flow that solves electrical behavior and temperature evolution in a single feedback loop** - it captures how current creates heat and heat changes electrical parameters, which is essential for realistic signoff in dense modern silicon.
**What Is Thermal-electrical co-simulation?**
- **Definition**: Joint numerical simulation where circuit equations and thermal equations are solved iteratively.
- **Feedback Path**: Electrical power raises temperature, then temperature modifies mobility, resistance, and leakage.
- **Scope**: Device, block, and full-chip analysis for hotspots, IR drop, and timing robustness.
- **Key Outputs**: Temperature map, performance derate, reliability stress map, and safe operating envelope.
**Why Thermal-electrical co-simulation Matters**
- **Accuracy**: Separate electrical or thermal only runs miss coupled nonlinear behavior.
- **Reliability Signoff**: Aging and wear models require realistic thermal context from co-simulation.
- **Power Integrity**: Temperature-driven resistance shifts influence IR drop and timing margins.
- **Design Tradeoff Visibility**: Enables objective balance of cooling, frequency targets, and power limits.
- **Operational Stability**: Supports robust control loops for throttling and workload scheduling.
**How It Is Used in Practice**
- **Model Preparation**: Create calibrated compact models for temperature-dependent electrical parameters.
- **Iterative Solve**: Run alternating electrical and thermal solves until power and temperature converge.
- **Scenario Sweep**: Evaluate worst-case workloads, ambient conditions, and cooling assumptions.
Thermal-electrical co-simulation is **the realistic signoff framework for power-dense semiconductor systems** - coupled analysis exposes risks that uncoupled flows frequently miss.