ultra shallow junction

**Ultra-Shallow Junction (USJ)** is the **sub-20nm deep source/drain extension regions required for short-channel effect control in advanced CMOS transistors** — with junction depth $x_j$ comparable to the channel length itself in sub-14nm nodes. **Why Junctions Must Be Shallow** - Short-channel effects (SCE): Drain depletion region reaches source → Vt rolloff, increased Ioff. - Rule of thumb: $x_j < L_{channel}/5$ — for 10nm transistor, $x_j < 2$nm required. - Shallower junctions reduce drain-induced barrier lowering (DIBL). **USJ Formation Challenges** **Implant Energy**: - Must use very low energy (< 1 keV for B, < 3 keV for As/P). - Low energy → shallow projected range $R_p$. - As energy → 0, channeling and straggle dominate over projected range. **Diffusion During Anneal**: - Boron: High diffusivity, diffuses during activation anneal → junction deepens. - Transient Enhanced Diffusion (TED): Implant damage creates interstitials that boost B diffusion transiently. - Solution: Millisecond anneal (MSA) — activates dopants before significant diffusion occurs. **Anneal Techniques for USJ** - **Rapid Thermal Anneal (RTA)**: 1050°C, 10 sec — acceptable for > 45nm. - **Spike Anneal**: Peak temperature for < 1 sec — reduces diffusion. - **Laser Spike Anneal (LSA)**: 1200–1350°C for microseconds — near-melt, maximum activation, minimum diffusion. Used at 28nm and below. - **Flash Lamp Anneal**: Millisecond pulses — between spike and laser. **Metrology** - **SIMS**: Dopant concentration vs. depth profile — gold standard for junction depth. - **Four-Point Probe (FPP)**: Sheet resistance — confirms activation. - **Spreading Resistance Profiling (SRP)**: Resistivity vs. depth. USJ formation is **one of the most challenging aspects of advanced CMOS scaling** — achieving sub-5nm junctions with high activation requires optimizing the implant-anneal sequence at the limits of physics.