wafer

A semiconductor wafer is a thin circular disk of crystalline silicon (typically 300mm diameter, 775μm thick) serving as the substrate for fabricating hundreds to thousands of individual integrated circuit dies. Process: ingot growth (Czochralski method—pull single crystal from molten silicon), slicing, polishing (CMP to sub-nm roughness), then front-end processing (transistor formation) and back-end processing (metal interconnects). Each die is one complete chip (processor, memory, ASIC). Die size: ranges from <1mm² (simple analog) to >800mm² (large GPUs). Yield = (good dies / total dies) × 100%—critical economic metric. Yield loss sources: random defects (particles), systematic defects (design-process interactions), parametric failures, and edge effects. Wafer cost: $5K-$20K+ depending on technology node; die cost = wafer cost / (good dies per wafer). Wafer types: bulk silicon (standard), SOI (silicon-on-insulator), epitaxial (grown layer). The wafer-to-chip journey involves 500-1000+ process steps over 2-3 months in a semiconductor fab.