wafer-level modeling
**Wafer-level modeling** is the simulation approach that predicts **across-wafer variations** in process outcomes (film thickness, CD, doping, etch rate, etc.) by modeling the spatial dependencies of equipment behavior, gas dynamics, thermal profiles, and other factors that create systematic patterns across the wafer surface.
**Why Across-Wafer Variation Matters**
- Semiconductor processes are never perfectly uniform across the wafer. Systematic variations in temperature, gas flow, plasma density, and other factors create **spatial patterns** — center-to-edge gradients, radial patterns, or asymmetric signatures.
- These within-wafer variations directly impact **yield**: die at the wafer edge may have different CD, film thickness, or device performance than die at the center.
- Understanding and predicting these patterns enables **compensation** (recipe tuning, multi-zone control) to improve uniformity.
**What Gets Modeled**
- **Deposition Uniformity**: CVD/PVD film thickness as a function of position — affected by gas flow patterns, temperature gradients, and chamber geometry.
- **Etch Uniformity**: Etch rate variation across the wafer — driven by plasma density non-uniformity, gas depletion (loading), and temperature.
- **CMP Uniformity**: Material removal rate variation — affected by pressure distribution, pad conditioning, and pattern density.
- **Lithography**: CD variation across the wafer due to lens aberrations, dose uniformity, and focus variation.
- **Implant**: Dose and energy uniformity across the wafer from beam scanning characteristics.
**Modeling Approaches**
- **Physics-Based**: Solve the underlying transport equations (gas dynamics, heat transfer, plasma physics) in the reactor geometry to predict the spatial profile. Most accurate but computationally expensive.
- **Semi-Empirical**: Use simplified physical models calibrated to wafer-level metrology data. Faster, good for process control.
- **Data-Driven**: Use machine learning (Gaussian processes, neural networks) trained on measured wafer maps to predict spatial patterns from recipe inputs.
- **Radial Models**: Many within-wafer patterns are approximately radially symmetric — model as a function of radial position with polynomial or spline basis functions.
**Applications**
- **Recipe Optimization**: Adjust multi-zone heater settings, gas injector ratios, or RF power zones to minimize across-wafer variation.
- **Virtual Metrology**: Predict wafer-level quality from equipment sensor data without measuring every wafer.
- **Feed-Forward Control**: Use upstream measurements (incoming film thickness) to adjust downstream process parameters for better uniformity.
- **Yield Modeling**: Predict which die locations are most at risk based on known within-wafer variation patterns.
Wafer-level modeling is **critical for yield optimization** — understanding and controlling spatial variation across the wafer is often the difference between 80% and 95% die yield.