Atomic Layer Deposition (ALD) is sequential surface-limited chemical reactions depositing sub-Ångstrom thickness layers with perfect conformality in 3D structures, enabling high-κ gate dielectric and interconnect barrier fabrication.

Self-Limiting Surface Reaction Mechanism:

• Cycle components: precursor purge (A) → reactant purge (B) → repeat
• Saturation: precursor molecule saturates substrate surface (monolayer coverage)
• Purge step: nitrogen or inert gas removes excess precursor (critical step)
• Reactant exposure: second precursor reacts with adsorbed first precursor
• Monolayer thickness: single reaction cycle deposits 0.1-0.3 nm typical
• Repeatability: cycle repeats for desired film thickness

Precursor Chemistry Options:

• Metal-organic precursor: organometallic compound (e.g., trimethylaluminum TMA)
• Halide precursor: chloride-based alternative (metal chloride, hydrogen chloride)
• Reactant gases: water (H₂O), ammonia (NH₃), ozone (O₃), hydrogen sulfide (H₂S)
• Reaction completion: thermodynamically driven, independent of dose (unlike CVD)

ALD Temperature Window:

• Lower bound: precursor decomposition/desorption temperature
• Upper bound: ALD saturation loss (physisorption → chemisorption tradeoff)
• Typical range: 100-300°C (material-dependent)
• Al₂O₃: 200-300°C (narrow window, tight control)
• HfO₂: 200-250°C (broader window, more process flexibility)

Conformality in 3D Structures:

• Aspect ratio: sequential reactions enable coating 100:1+ aspect ratio
• Mechanism: saturation prevents competitive deposition (self-limiting)
• Step coverage: ~100% achievable (vs CVD ~70-80%)
• Application: critical for fin-FET gate dielectric (3D gate coverage)

Material Deposition Examples:

• Al₂O₃: precursor TMA + water (gate dielectric in high-κ/metal gate)
• HfO₂: TEMAH + water (high-κ dielectric, replacement polysilicon gate)
• TiN: titanium precursor + ammonia (work-function metal, diffusion barrier)
• Ru: ruthenium precursor + reducing agent (interconnect metal, resistivity lower than TaN)
• W: tungsten precursor + hydrogen (via fill metal)

Plasma-Enhanced ALD (PEALD):

• Plasma activation: replaces thermal activation (enables lower temperature)
• Temperature reduction: lower deposition temperature (100-200°C vs 200-300°C)
• Application: temperature-sensitive substrate materials (organic, polymer)
• Trade-off: plasma damage risk (reduced vs conventional plasma etch)

Applications Across CMOS/Memory/Packaging:

• Logic gate dielectric: high-κ/metal gate stack (FEOL)
• DRAM: capacitor dielectric (ruthenium over Al₂O₃ → storage node)
• 3D NAND: interpoly dielectric (tunneling oxide layers)
• Interconnect: diffusion barrier (TaN/Ta over copper)
• Packaging: conformal coating on 3D structures (TSV liner, via sidewall coating)

Process Control and Dosing:

• Saturation detection: monitor film thickness as function of precursor dose
• Dose optimization: minimum dose for complete coverage (cost reduction)
• Precursor efficiency: percentage of precursor molecules incorporated
• Cycle time: ALD cycle takes 1-10 seconds (slow vs CVD throughput)

Throughput Challenge:

• Sequential nature: slow compared to continuous CVD/sputtering
• Tool design: spatial ALD (large substrate area, moving/rotating target) improves
• Flow dynamics: optimize purge times (faster = lower film quality)
• Trade-off: slower deposition balances excellent conformality

Yield and Reliability:

• Defect-free coating: ALD conformality enables robust interconnect barriers
• Impurity levels: high purity achievable (excellent for gate dielectric)
• Interface quality: precise atomic control enables low interface trap density
• Reliability: HfO₂ ALD gate dielectric enables decade+ IC lifetime

ALD remains critical enabler for advanced CMOS nodes and 3D memory—sequential nature and superb conformality justify slower throughput for high-value applications requiring extreme precision.