Plasma Damage is the unintended degradation of gate dielectric integrity caused by charge accumulation on floating conductors during plasma-based etch and deposition steps — where non-uniform ion and electron currents in the plasma create voltage stress across the thin gate oxide, potentially causing trap generation, threshold voltage shift, or dielectric breakdown that reduces transistor reliability and yield.

How Plasma Damage Occurs

1. During plasma etch, metal interconnect lines connected to transistor gates act as antennas collecting charge. 2. The charge has no discharge path (gate is floating during processing) → voltage builds across gate oxide. 3. If accumulated voltage exceeds oxide breakdown (~10-15V for thin oxides) → oxide damage. 4. Damage severity depends on the antenna ratio: area of exposed conductor / gate oxide area.

Antenna Ratio

• $AR = \frac{A_{metal}}{A_{gate\_oxide}}$
• Foundry rules typically limit AR < 400-1000 depending on process node.
• Long metal lines connected to small gates have the highest risk.
• At advanced nodes: Thinner oxides (< 2 nm) are more susceptible → tighter AR rules.

Damage Mechanisms

Prevention Strategies

• Antenna diodes: Insert protection diodes at gate nodes — provides discharge path during processing.
• Metal jumpers: Break long metal lines with via jumps to higher layer — reduces antenna area per segment.
• Process optimization: Pulsed plasma, low-damage etch chemistries, reduced plasma power.
• DRC antenna rules: EDA tools check antenna ratios during physical verification — flag violations.

Impact at Advanced Nodes

• FinFET/GAA: Gate oxide area extremely small (wrapped around fin/nanosheet) → antenna ratio violations more frequent.
• EUV single-patterning reduces some metal etch steps → fewer plasma exposure events.
• High-k dielectrics: Different damage thresholds than SiO2 — foundry-specific rules critical.

Plasma damage prevention is a mandatory design-for-manufacturing consideration — a single antenna rule violation can create a latent reliability defect that passes initial testing but causes field failure months later, making systematic antenna checking and diode insertion essential in every tapeout flow.