3D NAND Inter Deck Plug Etch

Inter-deck plug, or joint etch, is the step that exists purely to let a channel hole be cut in two separate passes and still come out looking like one continuous hole — a seam that has to disappear electrically even though it is never erased physically.

Lower-deck CH etch done
50-80:1 aspect ratio reached
Sacrificial plug fill
seals the open lower-deck hole
Upper-deck mask alignment
must register to the buried hole
Sac-poly recess
reopens the lower-deck hole
Upper-deck CH etch
continues the same channel

The problem it solves is simple to state and hard to avoid: a deep, open hole cannot sit underneath a second mask and deposition step without something going wrong.

Inter-Deck Plug (Joint) — the Seam Between Two Channel-Hole Passes a sacrificial fill and recess that gives the upper-deck mask a flat surface to align to lower deck (etched first) upper deck (etched second, after the plug) lower-deck CH etch sacrificial plug fill — seals the hole upper-deck CH etch mask aligned to buried lower hole any misalignment here = a kinked channel Why a plug, not a direct join the lower-deck hole can't stay open under the upper- deck mask and deposition a sacrificial fill seals it, giving a flat, stable surface to pattern on later removed by sac-poly recess, opening the hole back up for the upper deck A seam, not a second etch of the same kind the inter-deck plug is a fill-and-recess step, not a high-aspect-ratio etch — but the alignment it sets up for the upper-deck mask is just as critical as either deck's own aspect-ratio control. triple- and quad-deck channel holes multiply this exact seam — one more plug, one more alignment risk, per extra deck

A fully etched lower-deck channel hole cannot just sit open while the upper-deck mask gets patterned on top of it. Photoresist, hard-mask material, and deposited films would all fall unevenly into an open 50-to-80-to-1 hole, so a sacrificial fill plugs the hole first, turning an open trench into a flat, stable surface the upper-deck lithography can actually pattern on top of.

Alignment, not depth, is this step's real risk. The upper-deck mask has no direct view of the buried lower-deck hole underneath the plug — it has to register to it using overlay marks and process control alone, and any registration error here becomes a kinked or offset channel where the two decks meet, a defect that a perfectly etched lower deck and a perfectly etched upper deck can still produce together if the joint between them drifts.

Sac-poly recess is what turns the seal back into an opening. Once the upper-deck mask and etch are ready to continue the channel, this recess removes the sacrificial fill from the lower-deck hole, reopening it so the upper-deck etch can continue straight down into the same channel the lower deck already carved — the two passes meeting, ideally, as if they had never been separated at all.

This same seam multiplies with every additional deck. Triple- and quad-deck channel holes, now appearing as layer counts climb past what two decks can comfortably reach, don't just add more etch depth — they add one more inter-deck plug, one more sacrificial fill-and-recess cycle, and one more alignment seam per additional deck, each one carrying the same kink risk as the first.

Inter-deck plug etch is the clearest proof that channel-hole etch is not really one problem but two, joined: Samsung's V-NAND, SK hynix's 4D NAND, Kioxia/WD's BiCS, Micron, and YMTC's Xtacking all depend on this plug-and-recess seam to make a two-pass channel hole read, electrically, as a single continuous one — and as decks keep getting added, it is this joint, not either etch on its own, that increasingly decides whether the channel survives intact.

Take 3d nand inter deck plug etch further

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