3D NAND Drain Select Gate Cut

TSG/SSL cut is the shallowest trench etch anywhere in the 3D NAND array, and its entire job is splitting one continuous drain-side select-gate layer into independently switchable strings — without ever touching a single word line sitting just a few layers below it.

Stack complete to top
drain select-gate layers deposited
Shallow mask zone
limited to TSG/SSL layer depth
TSG/SSL etch
a few layers deep only
Depth verification
must stop before word lines
Independent drain-side strings
each selectable per bit line

That proximity to the word lines it must not reach is what makes this cut's depth control stricter than almost any other etch in the flow.

TSG/SSL Cut — Splitting the Drain-Side Select Gate, a Few Layers Deep the shallowest slit cut in the array, confined entirely to the top select-gate layers array stack, top select-gate layers highlighted drain-side select-gate layers (TSG/SSL) TSG/SSL cut — only through this band word-line layers below — untouched by this cut What the cut enables splits one continuous drain select-gate layer into independent strings each string gets its own drain-side switch, selected independently per bit line too deep a cut touches word lines below — not allowed The shallowest cut carries the strictest depth control a block-boundary slit can run the full stack depth with margin to spare; this cut has only a few layers of room — undershoot and the select gates stay connected, overshoot and a word line is cut that was never meant to be split, breaking far more of the array than intended. paired with BSG/GSL cut at the source-side select gate — same job, opposite end of the stack, different select-gate layer

The drain select gate (TSG, or SSL — top/string select line) sits at the very top of the array, right below the bit-line contacts, and it is what lets the array select one string of cells at a time for reading or programming. Left as one continuous layer, every string sharing that layer would switch together; the TSG/SSL cut severs it into separate segments so each bit line's string can be turned on or off independently of its neighbors.

The cut only runs through the top select-gate layers, by design. Unlike a block-boundary slit, which runs the full stack depth on purpose, TSG/SSL cut is confined to just the handful of layers that make up the drain select gate — stopping well short of the word-line layers underneath, because those word lines are shared across the strings this cut is separating and must stay intact.

Depth control here is unusually strict precisely because the margin is so thin. A block-boundary slit can afford meaningful overetch because there is a full stack's worth of depth to work with; TSG/SSL cut has only a few layers of select-gate material to etch through before reaching a word line it is never supposed to touch — undershooting leaves strings electrically connected that should be separate, and overshooting damages a shared word line that serves every string in the block.

BSG/GSL cut is this same operation performed at the opposite end of the stack. Where TSG/SSL splits the drain-side select gate near the top, BSG/GSL cut splits the source-side select gate (also called the ground select line) near the bottom — two shallow cuts, same depth-control discipline, isolating select gates on either end of the array from each other without ever reaching the word lines in between.

TSG/SSL cut is the etch that turns a physically continuous array into a collection of independently addressable strings: Samsung's V-NAND, SK hynix's 4D NAND, Kioxia/WD's BiCS, Micron, and YMTC's Xtacking all depend on this shallow, tightly controlled cut to give every bit line its own drain-side switch, and a few nanometers of depth error here is the difference between a working array and strings that can never be selected independently.

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