3D NAND Source Select Gate Cut

BSG/GSL cut does for the source-side select gate exactly what TSG/SSL cut does for the drain side, splitting one continuous layer into independently switchable segments — except this cut runs at the opposite end of the stack, close enough to the source-line plate that overetch threatens a second structure, not just the word lines above it.

That second hazard is the one difference that makes this cut, in practice, slightly less forgiving than its drain-side counterpart.

The source select gate (BSG — bottom select gate, or GSL — ground select line) sits just above the source-line plate, and its job mirrors the drain select gate's exactly. Left as one continuous layer, every string sharing it would connect to the source together; BSG/GSL cut severs that layer into separate segments so each string's connection to the common source can be switched independently.

This cut has to thread between two structures instead of one. TSG/SSL cut, near the top of the array, only has to stop short of the word lines below it. BSG/GSL cut, near the bottom, has to stop short of the word lines above it and avoid damaging the source-line plate sitting just beneath the select-gate band — the same narrow depth window as its drain-side twin, with one more structure close enough to be at risk from the same overetch.

It shares its mask step with every other slit-family cut, but not its target depth. Block-boundary slit, sub-block slit, TSG/SSL cut, and BSG/GSL cut are all patterned and etched as part of the same slit module, each stopping at a different depth tuned to its own job — this cut's depth target is simply the shallowest and closest to the plate of the group.

Getting this cut wrong has a specific downstream signature. A BSG/GSL cut that undershoots leaves source-side strings connected that should be isolated, showing up as strings that can't be individually deselected; one that overshoots risks a damaged source-line plate, which is also what a bad slit-bottom-punch etch or a bad CSL spacer can cause — three different etch steps that can each produce a similar source-side failure.

BSG/GSL cut completes the pair that gives the array its per-string addressability: Samsung's V-NAND, SK hynix's 4D NAND, Kioxia/WD's BiCS, Micron, and YMTC's Xtacking all isolate every string at both ends — TSG/SSL at the drain, BSG/GSL at the source — and it is specifically the source-side cut that has to respect the array's other critical structure sitting just beneath it.