atomic layer etching
**Atomic Layer Etching (ALE)** is the **self-limiting etch process that removes material one atomic layer at a time through alternating half-cycles of surface modification and removal** — providing angstrom-level etch depth control (1-3 Å per cycle), damage-free surfaces, and extreme uniformity across the wafer, essential for manufacturing sub-3nm transistors where even a single extra atomic layer of material removal can destroy device performance.
**ALE Process Cycle**
```
Step 1: Surface Modification (self-limiting)
- Expose surface to reactive gas (e.g., Cl₂ for Si etching)
- Gas reacts with top atomic layer only → forms modified layer (SiCl₂)
- Self-limiting: Once surface is saturated, reaction stops
- Purge: Remove excess gas
Step 2: Removal (self-limiting)
- Apply energy to remove only the modified layer
- Methods: Low-energy ion bombardment (Ar⁺), thermal desorption, or ligand exchange
- Self-limiting: Only modified layer is removed, underlying material is untouched
- Purge: Remove byproducts
→ Repeat cycle: Each cycle removes exactly one atomic layer (~2-5 Å)
```
**ALE vs. Conventional Etching**
| Parameter | Conventional RIE | ALE |
|-----------|-----------------|-----|
| Depth control | ±1-2 nm | ±0.5 Å |
| Damage | Ion damage 2-5 nm deep | Minimal (low-energy ions) |
| Uniformity | 1-3% | <0.5% |
| Throughput | Fast (nm/s) | Slow (Å/cycle, ~1 min/cycle) |
| Selectivity | Material-dependent | Near-infinite (self-limiting) |
| Cost | Low | High |
**Types of ALE**
| Type | Removal Mechanism | Materials | Application |
|------|-------------------|----------|-------------|
| Directional (anisotropic) | Ion bombardment | Si, SiO₂, SiN | Gate recess, spacer etch |
| Isotropic (thermal) | Thermal desorption / ligand exchange | Al₂O₃, HfO₂, SiO₂ | Lateral etch, undercut |
| Quasi-ALE | Modified continuous etch | Various | Production-friendly compromise |
**Key Chemistry Systems**
| Material | Modification | Removal | EPC (Å/cycle) |
|----------|-------------|---------|---------------|
| Silicon | Cl₂ (chlorination) | Ar⁺ (<50 eV) | 2-4 |
| SiO₂ | Fluorocarbon (CFₓ) | Ar⁺ | 1-3 |
| Si₃N₄ | CH₃F/O₂ | Ar⁺ | 2-5 |
| Al₂O₃ | HF (fluorination) | TMA (ligand exchange) | 0.5-1.5 |
| HfO₂ | HF | DMAC (ligand exchange) | 0.5-1.0 |
- EPC = Etch Per Cycle.
- Thermal ALE (no plasma): HF fluorinates surface → organometallic reactant removes fluorinated layer → zero damage.
**Applications in Advanced Nodes**
| Application | Why ALE Is Needed |
|------------|-------------------|
| Gate recess in GAA/nanosheet | Precise channel thickness control (±1 Å) |
| Inner spacer formation | Selective lateral recess of SiGe between nanosheets |
| Self-aligned contact etch | Stop precisely on ultrathin etch stop layers |
| FinFET fin recess | Uniform fin height control across wafer |
| 3D NAND step etch | Layer-by-layer removal for staircase contacts |
**Throughput Challenge**
- ALE: 1-5 Å per cycle, 30-60 seconds per cycle.
- To etch 10 nm: Need 20-50 cycles = 10-50 minutes per wafer per step.
- Conventional etch: Same 10 nm in seconds.
- Solution: Quasi-ALE (fast cycles with slightly reduced precision), multi-wafer ALE tools.
Atomic layer etching is **the precision sculpting tool that makes angstrom-scale semiconductor manufacturing possible** — analogous to how ALD adds material one atomic layer at a time, ALE removes material with the same atomic precision, providing the etch control needed for GAA/nanosheet transistors where the difference between a working and non-working device is literally a few atoms.