cobalt tungsten contact fill
**Cobalt and Tungsten Contact Fill** refers to the **metal deposition technologies used to fill nanoscale contact holes and vias that connect transistors to the first level of metal interconnects**, where the choice of fill metal (tungsten, cobalt, or ruthenium) and the associated barrier/liner stack critically determine contact resistance — increasingly the dominant component of total transistor resistance at advanced nodes.
As transistor dimensions shrink, the contact area between the metal plug and the transistor source/drain decreases quadratically. At 5nm nodes, contact resistance can contribute 30-50% of total device resistance (versus <10% at 28nm), making contact fill technology a first-order determinant of transistor performance.
**Contact Fill Materials**:
| Material | Resistivity | Barrier Need | Fill Quality | Node Usage |
|----------|-----------|-------------|-------------|------------|
| **Tungsten (W)** | 5-15 uΩ·cm (bulk) | TiN/TiN (thick) | Good (CVD fill) | 14nm+ |
| **Cobalt (Co)** | 6-12 uΩ·cm (bulk) | Thin or barrierless | Excellent (reflow) | 7nm-5nm |
| **Ruthenium (Ru)** | 7-10 uΩ·cm (bulk) | Barrierless | Good (CVD/ALD) | 3nm research |
| **Molybdenum (Mo)** | 5-8 uΩ·cm (bulk) | Minimal | Under development | Future nodes |
**Tungsten Fill Process**: The traditional contact fill metal. W is deposited by CVD (chemical vapor deposition) using WF6 precursor with H2 or SiH4 reduction. A TiN adhesion/barrier layer (3-5nm) is deposited first to prevent fluorine attack on the underlying silicide. The challenge at advanced nodes: the barrier layer consumes an increasingly large fraction of the contact hole cross-section (in a 15nm diameter contact, 5nm barrier leaves only 5nm for W fill), and the effective resistivity of thin W lines (with grain boundary and surface scattering) rises dramatically above the bulk value.
**Cobalt Fill Advantages**: Co was introduced at 7nm by Intel and TSMC as an alternative to W for the tightest contacts. Co can be deposited by CVD and then reflowed (annealed to flow into voids), producing superior gap fill and enabling thinner or no barrier layers. Without a thick TiN barrier, more of the contact hole volume is conductive metal, reducing resistance. Co also has better electromigration resistance than W for current-carrying interconnects.
**Silicide Interface**: Below the contact metal, a silicide layer (NiSi, TiSi2, or CoSi2 at older nodes; increasingly TiSi at advanced nodes) forms the low-resistance junction between the silicon source/drain and the metal contact. The silicide interface resistance depends on: silicide material, doping concentration at the interface, and contact area. At GAA nanosheet nodes, forming high-quality silicide around the complex 3D source/drain geometry is extremely challenging.
**Cobalt and tungsten contact fill technologies sit at the critical junction between the transistor and the interconnect — as the last nanometers of metal before the device, their resistance directly throttles transistor performance, making contact metallurgy one of the most intensively researched areas in advanced semiconductor manufacturing.**