contact resistance

**Contact Resistance** is the **electrical resistance at the interface between a metal and a semiconductor** — a critical parasitic that limits transistor on-current and dominates performance in sub-7nm devices where contact dimensions approach atomic scale. **Origin of Contact Resistance** - Metal/semiconductor interface forms a Schottky barrier if work functions differ. - Ohmic contact: Barrier thin enough for quantum tunneling → linear I-V. - Contact resistivity $\rho_c$ (Ω·cm²): Intrinsic material/process parameter. - Total contact resistance: $R_c = \rho_c / A_{contact}$ where $A$ = contact area. **Scaling Problem** - Transistor on-resistance $R_{on}$ has target ~100Ω·μm. - Contact area scales as $A \propto L^2$: At 5nm, $A = 25$ nm² = 25×10⁻¹⁴ cm². - For $R_c = 10Ω·μm$: $\rho_c = R_c \times A = 10 × 25×10⁻¹⁴ = 2.5×10⁻¹⁴ Ω·cm²$ required. - State-of-art (2024): $\rho_c \approx 5-10×10⁻⁹$ Ω·cm² — orders of magnitude from target. - Contact resistance now dominates $R_{on}$ at sub-5nm nodes. **Reducing Contact Resistance** **High Doping at Interface**: - Higher active dopant concentration → thinner Schottky barrier → more tunneling. - Target: > 2×10²¹ cm⁻³ at metal-semiconductor interface. - Achieved by: In-situ B-doped SiGe S/D epi + laser anneal. **Silicide Engineering**: - NiSi: $\rho_c = 10⁻⁸$ Ω·cm² on n⁺Si — adequate for 28nm. - TiSi2 (C54): $\rho_c = 10⁻⁸$ Ω·cm² — good but rough morphology. - NiPtSi: Improved thermal stability vs. pure NiSi. **Alternative Metals**: - TiSiN, Ti/TiN stack: Better barrier for p+ contacts. - GeSn alloy contacts: Lower barrier on SiGe. **Metrology** - **CTLM (Circular Transmission Line Model)**: Wafer-level $\rho_c$ extraction. - **Kelvin structure**: 4-point measurement eliminates spreading resistance. Contact resistance is **the emerging performance bottleneck at sub-5nm nodes** — scaling transistor dimensions without a proportional reduction in $\rho_c$ negates the benefits of gate length reduction and has driven intensive research into novel metal/semiconductor contact schemes.

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