corner extraction
**Corner extraction** is the process of using simulation to **identify and characterize the extreme operating conditions** (process corners) that define the boundaries of acceptable device and circuit performance — enabling designers to verify that chips will function correctly across all manufacturing variations.
**What Are Process Corners?**
- Due to manufacturing variability, no two transistors or chips are identical. Key parameters (threshold voltage, gate length, oxide thickness, doping) all vary within specified ranges.
- **Process corners** represent the **worst-case combinations** of these variations — the extreme conditions that produce the fastest, slowest, leakiest, or most power-hungry devices.
**Traditional Corner Definitions**
| Corner | NMOS | PMOS | Impact |
|--------|------|------|--------|
| **TT** | Typical | Typical | Nominal performance |
| **FF** | Fast | Fast | Highest speed, highest leakage |
| **SS** | Slow | Slow | Lowest speed, lowest leakage |
| **FS** | Fast | Slow | NMOS/PMOS mismatch |
| **SF** | Slow | Fast | PMOS/NMOS mismatch |
- **Fast** = shorter gate, thinner oxide, higher doping → higher drive current.
- **Slow** = longer gate, thicker oxide, lower doping → lower drive current.
**How Corner Extraction Works**
- **Step 1 — Identify Key Parameters**: Determine which process parameters have the most impact on device performance (gate length, Vth, tox, doping, etc.).
- **Step 2 — Measure Variation**: Collect statistical data from the fab on these parameters — means and standard deviations.
- **Step 3 — Simulate Extremes**: Use TCAD process and device simulation to model devices at the extreme values (typically ±3σ) of each key parameter.
- **Step 4 — Extract Models**: Generate compact (SPICE) model parameters for each corner condition.
- **Step 5 — Validate**: Compare corner model predictions with measured silicon data from lot splits or test chips.
**Modern Corner Extraction**
- **Statistical Corners**: Rather than using simple min/max combinations, modern approaches use **Monte Carlo simulation** to generate thousands of parameter combinations and extract corners that represent realistic worst-case scenarios.
- **Local vs. Global Variation**: Distinguish between **die-to-die** (global) and **within-die** (local, mismatch) variation — they affect circuits differently.
- **Multi-Corner Multi-Mode (MCMM)**: Modern SoCs must meet timing at multiple corners simultaneously — each corner represents a different operating condition (voltage, temperature, process).
**Why Corner Extraction Matters**
- **Design Margin**: If a circuit works at all corners, it will work for virtually all manufactured chips.
- **Yield Prediction**: The fraction of chips that fall within all corners determines the expected yield.
- **Guard-Banding**: Corners define the margin between design targets and specification limits.
Corner extraction is the **critical link** between manufacturing variability and design robustness — it ensures that chips designed in simulation will function reliably across the full range of real-world manufacturing variation.