Delta Sigma Idle Tones
# Delta-Sigma Idle Tones: When a Quiet Input Produces a Pattern
Idle tones are discrete spectral components that can appear in delta-sigma converters under certain quiet or nearly constant input conditions. The modulator is a nonlinear feedback system, and its quantization error need not behave like independent white noise. Repeating or strongly correlated output patterns can concentrate energy into lines.
The behavior depends on architecture, input level, internal state, dither and circuit implementation. Not every quiet input produces a troublesome tone, and not every modulator line survives to the final converter output.
## 1. Connect the bit pattern to its spectrum
*Exact illustrative sequence from a simple unipolar accumulator model, not a commercial ADC simulation. At each step, form u = a + x, output y = 1 if u ≥ 1 and otherwise 0, then update a = u − y. Starting from a = 0 with x = 1/4 produces 0001 repeatedly. Spectral stem heights are not scaled.*
A sequence with period P has spectral components on a grid spaced by fs/P, where fs is the modulator sample rate. For the displayed period-four sequence, the average is 1/4 and the alternating content has lines at fs/4 and fs/2 in the first Nyquist zone. This simple example demonstrates periodicity; it does not show an audible or in-band idle tone by itself.
The sequence is the high-rate modulator output, not the final multi-bit ADC code stream. Digital filtering and rate reduction determine which components reach that output.
## 2. Follow the line through the digital response
*Hypothetical rate and passband example. It illustrates possible line locations, not a claim that a given converter generates a period-128 pattern. The required stopband attenuation is not specified.*
With fs = 256 kS/s, a period-four line occurs at 64 kHz and can be rejected by a digital filter retaining only 0–3 kHz. A period-128 component at 2 kHz lies inside that passband and can remain in the 8-kS/s output. A filter cannot selectively remove a tone and simultaneously preserve an arbitrary desired signal at the same frequency using ordinary frequency selection alone.
Before decimation, stopband rejection must also suppress components that would alias at the lower output rate. A high-frequency bitstream line can therefore matter if the actual decimation filter does not reject it sufficiently.
## 3. Distinguish the mechanisms behind a spur
Idle-pattern behavior is one possible source of a quiet-input spectral line. Clock coupling, reference modulation, digital switching, external interference and power-supply ripple can also produce spurs. Their frequencies may follow different clocks or operating conditions, so diagnosis should test more than the presence of a narrow FFT peak.
The common linearized delta-sigma model replaces quantization error with an additive noise source. It is useful for many noise-shaping calculations, but assuming that source is white and independent can miss deterministic pattern behavior. Detailed modulator or behavioral analysis may be required for idle-tone assessment.
| Check | What it can reveal | Important qualification |
|---|---|---|
| Sweep small DC input offsets | Input-dependent pattern changes | Offset may include the entire signal chain |
| Change sample rate or output data rate | Clock/rate relationships and filtering | Multiple settings may change together |
| Compare dither enabled/disabled | Sensitivity to decorrelation | Added noise can obscure a peak |
| Change reference or supply conditions | Coupling and modulation paths | Keep gain and bandwidth comparable |
## 4. Evaluate remedies against the full noise budget
Dither can disrupt repeating patterns and reduce some tonal components. It may also raise broadband noise, consume headroom or introduce additional mixing products. Compare spur amplitude and integrated noise together; a less visible peak does not by itself establish a better measurement.
An input-offset change can move a pattern-related line, but is not a universal cure and may alter accuracy or headroom. Converter architectures and internal mitigation features differ; use the device’s documented operating conditions rather than assuming higher order or a particular bit depth eliminates every tone.
Digital filter selection can reject out-of-band components when the desired signal bandwidth permits it. A notch inside the signal band trades away information at the notched frequency. Verify that any such trade is acceptable for the application.
## 5. Verify quiet-input performance
Use long records and adequate spectral resolution while controlling input, source impedance, reference, temperature and clock settings. Inspect time-domain codes, repeatability, FFT windows and averaging settings; leakage or averaging can change the apparent height of a narrow line. Report the line in calibrated units or dB relative to a defined reference.
Repeat across relevant DC inputs and operating corners, including small AC signals with offsets. Keep modulator sample rate distinct from final output data rate. ADC dither and noise folding in sampling provide related tools, but idle-tone diagnosis requires following the actual nonlinear pattern and complete signal path.
## References
- [Analog Devices: Using Sigma-Delta Converters, Part 1](https://www.analog.com/en/resources/analog-dialogue/articles/using-sigma-delta-converters-1.html) — idle patterns, reference modulation and output tones.
- [Analog Devices: Using Sigma-Delta Converters, Part 2](https://www.analog.com/en/resources/analog-dialogue/articles/using-sigma-delta-converters-2.html) — dither, noise and practical converter behavior.
- [Texas Instruments: Sigma Delta Modulator Overview](https://www.ti.com/video/6309772987112) — modulator and filtering context.