DRAM-1968 Step 11 Name Dennard the 1968 Ibm Patent Filing

# Name Dennard: The Actual 1968 IBM Patent Filing Behind This Series

Every step in this series so far described the one-transistor, one-capacitor cell by its behavior; none named the person or the paper that first claimed it as an invention, and that omission is worth correcting directly.

## 1. Attach a Name and a Document to Ten Steps of Behavior

Robert H. Dennard filed US Patent 3,387,286 ("Field-Effect Transistor Memory") while at IBM's Thomas J. Watson Research Center, with a priority date in 1967 and issue in 1968 — the same year this series' own chronology is anchored to. The patent's claims are narrow and specific: a single field-effect transistor gating charge onto a capacitor, read by sensing the charge shared onto a bit line, refreshed before leakage removes usable margin. That claim scope matches, almost exactly, the behavior this series built up independently across Steps 1 through 10 — the cell, the leakage, the refresh, the destructive readout, the density argument. The patent did not describe a fabrication process; IBM's own manufacturing and the planar-process and silicon-gate work this project already covers (`planar_process_1959`, `silicon_gate_1967`) supplied that separately.

Name Dennard: The Actual 1968 IBM Patent Filing Behind This Series Step 11 — dram-1968 Attach a Name and a Document to Ten Steps of Beh see Section 1 Separate Invention Priority From Commercial Prio see Section 2 Place the Correction in This Series' Own Record see Section 3 THREE-PART ARGUMENT, ONE STEP dram-1968 extension, step 11 of this project's DRAM lineage

## 2. Separate Invention Priority From Commercial Priority

Dennard's patent establishes invention priority, not commercial priority. IBM did not rush the 1T1C cell into a shipped memory product immediately; the first commercially sold DRAM part is Intel's 1103, introduced in 1970 — two years after Dennard's patent issued, and built by a company that did not hold the patent. IBM's own internal use of 1T1C memory predates the 1103 in IBM mainframes, but as internal/captive memory rather than a catalog part sold to other designers. The gap between patent and product matters for the same reason this project has flagged it elsewhere (Step 1 of `cmos_invention_1963`): a correct, working circuit idea and a shippable commercial part are different achievements, on different timelines, sometimes credited to different organizations.

Step 11 in the Dram-1968 Lineage what this step inherits and what it hands forward, by name Step 11 this step Inherits prior steps Hands Off named thread NO CELL-PHYSICS OR ARCHITECTURE RE-ARGUED each step adds a distinct angle; none re-derive settled prior content

## 3. Place the Correction in This Series' Own Record

This step does not change anything Steps 1 through 10 argued about the cell's physics or architecture; it simply attaches the missing attribution those steps left implicit. The 1T1C cell this series built, leak-tested, refreshed, and classified is Dennard's claimed invention, filed in 1968, documented in US Patent 3,387,286, built on the planar and silicon-gate foundation this project's own earlier series established, and — as the next step covers — not yet a shipped product at the moment this series' own internal chronology closes.

Take dram-1968 step 11 name dennard the 1968 ibm patent filing further

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