Define the 4k Bit Density Target

# Define the 4K-Bit Density Target

The generation that followed 1K DRAM set its target at 4,096 bits per chip, a four-fold jump in a single generation rather than an incremental step.

Reaching 4K bits meant a larger array of memory cells on a comparable die, which in turn meant more rows and more columns to address from outside the package.

The density target was set first; the addressing and packaging problems that density created had to be solved to make the part sellable.

4K BIT TARGETArray sizeroughly 64 rows by 64 columns of 1T1C cellsGeneration jumpfour times the bits of the prior 1K generationDie sizelarger array, same cost pressure to keep die small

Diagram above: 4k bit target.

WHAT GROWING THE ARRAY FORCESMore rowsneeds more row-address bitsMore columnsneeds more column-address bitsNet effecttotal address bits roughly double for 4x density

Diagram above: what growing the array forces.

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