64k-DRAM-1979 Step 8 Adopt Page Mode Access Reusing the Activated Row
# Adopt Page Mode: Reuse What Row Activation Already Left Standing
Step 3 established that one row activation disturbs an entire row's worth of cells as a side effect of addressing; this step asks whether that side effect can be turned into a deliberate advantage rather than only a refresh obligation.
## 1. State What Row Activation Leaves Available
Once a row is activated (Step 3's own mechanism) and its cells' charge is sensed onto the array's bit lines, every cell in that row is, briefly, available for column-level access without repeating the row-activation step — the same row-wide sensing this series' Step 3 treated purely as a refresh-scheduling obligation also makes an entire row's data accessible through successive column selections alone.
## 2. State the Page-Mode Access Scheme This Enables
Page mode holds a row active (RAS held low, in this series' own Step 2 timing convention) across multiple successive column (CAS) cycles, each one accessing a different column within the already-activated row, without paying the full row-activation latency again for each access. Because row activation is the slower of the two timing phases this series' Step 2 established, accessing several columns within one held-open row is substantially faster, per access, than repeating a full row-plus-column cycle for each one.
## 3. Connect Page Mode Back to This Series' Own Refresh Accounting
Page mode does not change Step 4's refresh-cycle count — the row is still refreshed by the same activation this series already counted, whether or not a host takes advantage of page-mode access while that row happens to be open. It is a performance feature layered on top of the addressing-and-activation mechanism this series built, not a change to the architecture's refresh obligations.