FinFET 2010s Require Replacement Metal Gate as Enabling Companion Process

# FinFET (2010s): Step 7 — Require Replacement-Metal-Gate as FinFET's Enabling Companion Process

## 1. A Gate Stack Problem the Fin Alone Does Not Solve

Steps 2-6 established the fin's geometry and how it is patterned, but wrapping any gate material around three sides of a tall, narrow fin is a materially different integration problem than depositing a gate stack over a flat planar channel. The `advanced_cmos_scaling_2000s` series already established, for planar transistors, that high-k dielectrics require a metal gate electrode rather than polysilicon to avoid Fermi-level pinning and polysilicon depletion; FinFET inherits that same requirement, but on a 3D surface, not a flat one.

## 2. Why Gate-First Integration Specifically Fails on a Fin

Gate-first flows deposit the final metal gate stack before the high-temperature source/drain activation anneal, which planar gate-first integration could tolerate within limits. On a fin's narrow, topographically complex 3D surface, that same high-temperature anneal degrades work-function metal uniformity far more severely than it did on a flat planar gate, because the metal must retain a controlled work function across the fin's top and both sidewalls simultaneously, not just across one flat surface.

## 3. Replacement-Metal-Gate as the Production Answer

Gate-last, or replacement-metal-gate (RMG), integration instead uses a disposable dummy gate through the entire high-temperature source/drain process, then removes it and deposits the final work-function metal stack afterward, once no further high-temperature steps remain. This order of operations protects the metal gate's work function from thermal degradation entirely, and became essentially mandatory, rather than merely preferred, once the gate had to wrap a 3D fin rather than sit on a flat channel.

## 4. What This Step Does and Does Not Cover

This step establishes that RMG is FinFET's enabling companion process, not an optional refinement; it does not yet walk through the specific process sequence RMG requires on a fin, which Step 8 covers directly.

Gate-First Integration Degrades Faster on a 3D Fin Than on a Flat Channel work-function metal uniformity after high-temperature source/drain anneal, planar versus fin topography gate-first on a flat planar channel: work-function shift is real but was tolerable through the 2000s gate-first on a 3D fin: work-function degrades far more severely across top and both sidewalls the same anneal that was survivable on a flat gate is not survivable on a wrapped 3D gate process generation advances left to right across this chart replacement-metal-gate removes the dummy gate before this anneal occurs, not after RMG shifts from preferred to essentially mandatory once the gate must wrap a fin
Why the Fin Forces Gate-Last the structural reason FinFET could not simply inherit planar gate-first integration PLANAR GATE-FIRST flat gate, one surface — thermal work-function shift was manageable through the 2000s FIN TOPOGRAPHY same metal must now hold its work function across a top and two sidewalls at once REPLACEMENT GATE (RMG) dummy gate absorbs the high-temperature anneal; final metal goes in afterward this step establishes RMG as required; the specific fin-RMG process sequence follows in Step 8

Take finfet 2010s require replacement metal gate as enabling companion process further

Ask the copilot about this term, or have our engineers assess it against your process.

Ask CFSGPT about this → Request a technical assessment → Open the CFS app