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**Hot Carrier Injection (HCI) Degradation** is **a device failure mechanism where energetic charge carriers acquire excess energy from electric fields, enabling them to overcome barriers and become trapped in dielectrics — causing shifts in device characteristics and long-term reliability degradation**. Hot Carrier Injection represents a fundamental reliability concern in semiconductor devices, particularly at advanced nodes. When applying large drain-source voltage, electrons in the channel acquire kinetic energy from the electric field. In regions near the drain junction, the field is particularly intense, and electrons gain energy exceeding the oxide barrier height. These hot electrons tunnel or jump into the oxide or gate dielectric, becoming trapped. The trapped charge shifts the threshold voltage and degrades device performance over time. HCI becomes worse at smaller dimensions where electric field concentrations are intense. The drain-induced barrier lowering (DIBL) effect — channel potential lowering due to drain bias — exacerbates hot carrier effects. Reducing gate oxide thickness, necessary for scaling, increases field intensity and HCI severity. HCI manifests as threshold voltage increase, transconductance reduction, and subthreshold swing degradation. Devices operating at high drain voltage are most vulnerable. Careful design and operation margin allocation are necessary. Substrate current (impact ionization current near drain) indicates HCI activity. Peak substrate current typically occurs at intermediate gate voltage. Understanding substrate current distribution guides design to minimize HCI. Mitigation strategies include careful oxide thickness optimization, lightly-doped drain (LDD) implant engineering to reduce field concentration, and drain engineering to smooth potential profiles. Gate length elongation at drain end (drain-extended gate) reduces field concentration. Higher-κ gate dielectrics reduce electric field for the same capacitance. Reduced operating voltage margins mitigate HCI. Temperature affects HCI significantly — higher temperature increases tunneling rates. Cryogenic operation might improve lifetime, but thermal management makes this impractical. Bias temperature instability (BTI) can combine with HCI, producing complex aging. Long-term reliability is modeled empirically through power law or exponential degradation, then extrapolated to device lifetime predictions. Accelerated testing at elevated temperature and voltage enables faster degradation, from which nominal conditions are projected. The relationship between stress conditions and degradation rate follows complex temperature and voltage dependencies. Recent work with high-κ/metal gate stacks introduces new HCI mechanisms and complicates mitigation. **Hot carrier injection remains a critical reliability challenge requiring careful device design, dielectric engineering, and operating margin management to ensure lifetime requirements.**