hot carrier injection (hci)

Hot Carrier Injection (HCI) Overview Hot Carrier Injection is a transistor reliability degradation mechanism where high-energy ("hot") carriers (electrons or holes) gain enough kinetic energy in the channel to overcome the Si/SiO₂ barrier and become trapped in the gate oxide, shifting threshold voltage and reducing drive current over time. Mechanism 1. High lateral electric field near the drain accelerates channel carriers to high kinetic energy. 2. Some carriers gain enough energy (> 3.2 eV for electrons, > 4.6 eV for holes) to surmount the Si-SiO₂ barrier. 3. Injected carriers become trapped in the oxide or create interface states (Si-H bond breaking). 4. Trapped charge shifts Vt, degrades transconductance (gm), and increases subthreshold slope. Worst-Case Conditions - NMOS: Maximum substrate current condition (Vgs ≈ Vds/2). Highest impact ionization rate. - PMOS: Less susceptible than NMOS (holes have lower injection probability). Worst at Vgs = Vds. - Short channels: Higher lateral field → more hot carriers. HCI worsens with scaling. Mitigation - Lightly Doped Drain (LDD): Lower drain doping near channel reduces peak electric field. - Halo Implants: Control short-channel effects to reduce lateral field. - Supply Voltage Reduction: Lower Vdd reduces carrier energy (most effective solution). - Nitrided Gate Oxide: N incorporation reduces charge trapping and interface state generation. - Reliability-aware Design: Derate transistor operating conditions below worst-case HCI limits. Testing HCI lifetime is projected from accelerated stress tests at elevated voltage (1.1-1.2× nominal Vdd). Lifetime must meet 10-year specification at nominal operating conditions (typically > 10 years at use conditions for qualification).