Jfet

JFET is the standard abbreviation for the junction field-effect transistor, and in practice the word usually refers to a small three-terminal part, labelled gate, source and drain, used where a circuit needs a very high input impedance and low noise. It is a normally-on device: with the gate tied to the source, current flows from drain to source, and the gate is then driven negative in an n-channel part, or positive in a p-channel one, to reduce that current. This entry concerns the device as a circuit component, covering symbols, polarity, the shape of its characteristic curves and the circuits that make good use of it; the physics of the depletion region is treated under its full name.

The schematic symbol tells the channel type at a glance, through the direction of the gate arrow. A vertical line represents the channel, with the drain at the top and the source at the bottom, and the gate lead joins it from the side with an arrow. For an n-channel JFET the arrow points toward the channel, because the gate-channel junction is a p-n diode with the p-type gate on the arrow's tail; for a p-channel JFET the arrow points away from it. Unlike a bipolar transistor, most JFETs are physically symmetric, so source and drain can be swapped without much change, which is why some symbols draw the gate at the middle of the channel and others offset it toward the source to mark which end is conventionally the source. N-channel parts, such as the 2N5457 and J201 in hobby practice, are far more common than p-channel ones.

The drain characteristic has two regions, and IDSS is the anchor of the saturation region. At low drain-source voltage the JFET behaves like a resistor whose value is set by the gate voltage, the ohmic region, useful for voltage-controlled attenuators and gain-control circuits. Above a knee of a few volts the current flattens into a plateau, the saturation region, in which the drain current depends mainly on the gate voltage and hardly at all on the drain voltage. The plateau reached with the gate shorted to the source is called IDSS, the drain current at zero gate-source voltage, and it is the largest steady current the device is normally operated at; as the gate is driven further from zero, the plateau drops roughly in proportion to the square of the remaining gate swing until it reaches zero at the pinch-off voltage. A pitfall is that IDSS and pinch-off voltage vary widely from sample to sample, even within a single part number, by factors of several, so a design must tolerate that spread rather than trust a single typical value.

Because a JFET is normally on, biasing is simpler than it looks and different from bipolar habits. In a common-source stage the gate is held at ground through a high-value resistor, which draws no meaningful current, and a resistor in the source lead raises the source above ground as the drain current flows, so the gate ends up negative relative to the source automatically, a technique called self-bias. This sets the operating point without any negative supply, and the resistor's feedback also reduces the effect of the sample-to-sample spread. A source follower buffers a high-impedance signal source to a low-impedance load, and a JFET with gate tied to source acts as a rough current limiter, the basis of the current-regulator diode. In every one of these circuits the gate must stay reverse biased; driving a signal so far positive that the gate diode conducts distorts the waveform and loads the source.

The modern use of the JFET is chiefly as a quiet front end. The Toshiba 2SK170 type reaches a voltage noise on the order of one nanovolt per root hertz, and its low current noise lets it outperform bipolar input stages when the source impedance is high; this is why JFETs sit at the input of many audio mixers, condenser microphone capsules, test equipment and analog sensors. Integrated JFET-input op amps pair these front ends with bipolar gain stages, giving input bias currents in the picoampere range. For switching and digital logic, JFETs lost to MOSFETs long ago, and one common misconception is that a JFET behaves like an enhancement MOSFET that simply turns on above a threshold, when its normal state is conducting and the gate must be pulled away from the source to turn it off.

Read JFET as the part-sized, normally-on valve of analog design, chosen when a signal source is so delicate that the amplifier must listen without touching it.