Source Follower Amplifier

# Source Follower Amplifier: A Voltage Buffer at the Source

A source follower, also called a common-drain amplifier, applies its signal at a MOS transistor’s gate and takes the output from its source. The source moves in the same direction as the gate. Its useful role is impedance buffering: a high-resistance gate input controls a lower-resistance source output that can supply signal current to a load.

The drain connects to a supply that is approximately AC ground over the signal band. “Follower” describes incremental signal tracking; the source DC voltage remains below the gate voltage by the VGS required for the operating current.

## 1. Follow the local feedback

Source follower circuit and local feedbackNMOS drain connected to VDD, gate input and source output. Source node drives a resistor to ground and a bias current sink. Body connection omitted. A positive gate change raises source voltage, reducing the gate-source error.The output follows at the sourceGate input, source output, drain held at a quiet supply.VDDv inv outRLBias-current sinkGate risesVGS initially increases.More current flowsThe source node rises.VGS is reduced againLocal feedback makes thesource track the gate.Buffer action: high gate resistance → low source resistance

*Simplified NMOS follower with a bias-current sink and resistive load. The gate input includes DC bias. Body connection, bias-generation circuits and practical supply decoupling are omitted. The input and output must stay within the circuit’s valid operating range.*

A positive gate change initially increases VGS and drain current. The resulting source-voltage rise reduces VGS again. This feedback makes the source follow the gate with noninverting gain generally below unity in the simple low-frequency stage.

The buffer’s load current comes from the power supply through the transistor. The gate does not supply that output current. At high frequency, however, gate capacitances require drive current, so the actual input impedance is frequency dependent.

## 2. See why gain is below one

Source follower gain versus load resistanceAnalytical low-frequency gain gm divided by gm plus gmb plus1/RL. For gm10millisiemens, load100ohms to10kilohms on logarithmic axis. Blue zero body effect approaches1; green gmb0.2gm approaches0.833. Ideal current sink and infinite transistor output resistance.A heavier load pulls the gain downCalculated at fixed gm = 10 mS; ideal bias sink and ro → infinity.Small-signal voltage gain (V/V)00.250.50.7511003001k3k10kgmb = 0gmb = 0.2 gmLoad resistance RL (Ω, logarithmic scale)Body effect limits gain even when the resistive load is light.

*Analytical low-frequency curves, not PDK simulation or measured data. Transconductance is held fixed while the load varies; gate DC bias may need adjustment to keep that operating point. The ideal bias sink has infinite output resistance.*

With the drain and body at AC ground, a useful small-signal expression is Av ≈ gm / (gm + gmb + gds + Gbias + GL). Here gmb is body transconductance, gds = 1/ro is transistor output conductance, Gbias is bias-sink output conductance, and GL = 1/RL is external load conductance. Each term is evaluated at the operating point.

For gm = 10 mS, gmb = 2 mS, negligible gds and Gbias, and RL = 1 kilohm, gain is approximately 10/(10 + 2 + 1) = 0.769 V/V. With a very light resistive load it approaches 10/12 = 0.833, rather than one, under the same body-effect assumptions. If the body follows the source, the incremental body effect can be reduced, but that connection requires an appropriate device isolation and well arrangement.

With the input voltage source set to zero, the stage’s unloaded output resistance is approximately Rout ≈ 1/(gm + gmb + gds + Gbias) in this model. The same example gives about 83 ohms. An external RL appears in parallel when measuring the loaded output node. Driver impedance and capacitances require a fuller frequency-dependent analysis.

## 3. Separate offset, gain and swing

QuantityWhat it describesMain design check
DC level shiftGate voltage minus source voltage at biasVGS varies with current, body bias and temperature
Small-signal gainIncremental source change divided by gate changegm, body effect, output conductance and loading
Output swingRange that preserves the intended operating stateFollower saturation and bias-sink compliance
Dynamic driveCurrent available to charge or discharge a loadBias current, peak transistor current and load capacitance

A constant threshold-voltage subtraction is not an accurate general model of the follower’s output. The required VGS depends on the operating point, and body effect can change threshold as the source moves. Near a rail, the follower or its current sink may leave saturation and the small-signal estimates cease to apply.

## 4. Check the load in time as well as frequency

A capacitive load requires current i = C dV/dt. In this simple class-A arrangement, the NMOS supplies rising-edge current while the bias sink sets the available falling-edge discharge current when the transistor turns down. With a high-resistance DC load and an approximately constant 100-microampere sink, a 10-pF capacitor has an idealized downward slew limit near 10 V/µs. Other current paths, compliance and transistor behavior alter that estimate.

Evaluate both edge directions, settling error and distortion with the actual load. A small-signal bandwidth estimate cannot establish large-signal settling performance. Include input-driver resistance, device capacitances, supply impedance and extracted interconnect when verifying fast buffers.

The source follower complements the common-gate amplifier: one takes gate input and source output, while the other takes source input and drain output. Both use the transistor’s source-terminal dynamics, but their port impedances and design roles differ.

## References

  • [Analog Devices: Activity — The Source Follower](https://wiki.analog.com/university/courses/alm1k/alm-lab-11m) — NMOS follower operation and output-impedance experiments.
  • [Analog Devices: Advanced Amplifier Topics](https://wiki.analog.com/university/courses/electronics/text/chapter-16) — follower biasing and body-effect limits.
  • [JKU: Analog Integrated Circuit Design](https://iic-jku.github.io/analog-circuit-design/aicd.html) — MOS small-signal models and body transconductance.

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