known good die (kgd)

A **Known Good Die (KGD)** is a bare semiconductor die that has been **fully tested and verified** to meet all functional and reliability specifications **before** being placed into a package or integrated into a multi-chip module. The concept is critical in advanced packaging scenarios like **2.5D/3D integration**, **chiplets**, and **system-in-package (SiP)** designs. **Why KGD Matters** - **Multi-Die Economics**: When combining multiple dies into one package, a single bad die renders the entire expensive assembly defective. Each die must be proven good beforehand. - **Cost Avoidance**: Packaging and assembly costs can be **significant** — catching defects at the bare die stage avoids wasting downstream resources. - **Yield Compounding**: If you assemble 4 dies each with 95% yield, compound yield drops to ~81%. KGD testing pushes individual die yield as close to **100%** as possible. **KGD Testing Challenges** - **Probe Testing at Speed**: Bare dies lack package parasitics, making high-speed testing tricky. Specialized **probe cards** and **temporary carriers** are used. - **Burn-In Without Package**: Some KGD flows use **wafer-level burn-in (WLBI)** to screen early-life failures before assembly. - **Standardization**: The **JEDEC KGD standard** defines quality levels and test coverage expectations for bare die shipments. KGD has become increasingly important as the semiconductor industry moves toward **heterogeneous integration** and **chiplet-based architectures** where dies from different fabs and process nodes are assembled together.