Store the CPUs Own Control Sequences in Microcode Rom Not User Program

# Store the CPUs Own Control Sequences in Microcode ROM, Not User Program

## 1. Distinguish a CPUs Internal Control Store From Its External Program Store

Microcode ROM stores the fixed sequence of low-level control signals a CPU itself steps through internally to execute one machine instruction — gating which internal buses connect, which registers latch, and which arithmetic operation the data path performs on a given clock cycle — and it is addressed by the CPU's own instruction decoder, not by anything the programmer wrote. This is a genuinely different role from the 4001's program ROM already covered in `microprocessor_1971_step06`: the 4001 stores the user-facing sequence of instructions a programmer chose to write for a specific product, fetched one instruction at a time by the 4004's program counter; a microcode ROM, inside a CPU that uses one, stores the CPU designer's own fixed internal control sequence for carrying out a single instruction once it has already been fetched and decoded, and the programmer never sees or addresses it directly at all.

## 2. Address Microcode by Opcode and Step, Not by a Programmer-Visible Address

A microcoded CPU's instruction decoder converts a fetched opcode into a starting address inside the microcode ROM; a sequencer then steps through that ROM's rows one control-cycle at a time, each row's fixed bit pattern asserting whichever internal control lines that cycle of execution requires, until the instruction's full microcode sequence completes and the CPU returns to fetching the next instruction. This is the same decoded-row-select, read-fixed-bit-pattern addressing shape covered in Steps 2–4, applied to an entirely internal, programmer-invisible address space rather than to a memory location a program can read or write.

Step 13 names real CPUs that used microcode ROM this way and states precisely how this differs from the 4001's own role.