Materials

Semiconductor materials are the substances a chip is built from and patterned with: the crystalline substrate that carries the devices, the thin films grown and deposited on it layer by layer, and the metals that wire those devices together. Material choice sets the ceiling on what a device can do — how fast it switches, how much voltage it holds off, how much heat it sheds — long before circuit design gets a say.

Silicon persists because of its oxide, not its bandgap. On raw electrical merit silicon is unremarkable: a 1.12 eV bandgap, 1,400 cm²/V·s electron mobility, and a critical field near 0.3 MV/cm are each beaten by half a dozen compounds. What no competitor has matched is SiO₂ — a native, thermally grown, electrically near-perfect insulator that forms on the crystal itself. Add Czochralski boules pulled to 300 mm with defect densities in the single digits per wafer, and silicon wins on manufacturability by a margin that physics alone never overturns.

The gate stack was the first place silicon dioxide had to go. By the mid-2000s the gate oxide had thinned to roughly 1.2 nm — five atomic layers — and electrons tunnelled straight through it. The fix was to hold the electrical thickness while increasing the physical one, which means raising the dielectric constant: hafnium oxide at k ≈ 20–25 against SiO₂ at 3.9. High-k metal gate arrived at 45 nm and brought its own materials problem, because polysilicon gates no longer worked against hafnium. Modern stacks set the threshold voltage with work-function metals — TiN, TiAlC, TaN — deposited by ALD in films a few nanometres thick.

Interconnect metals are the constraint nobody has solved. Copper replaced aluminium in 1997 because a bulk resistivity of 1.68 µΩ·cm beat 2.65. But copper's electron mean free path is about 39 nm, and once a wire is narrower than that, surface and grain-boundary scattering dominate — resistivity climbs steeply exactly where wires are thinnest and most numerous. Worse, copper needs a tantalum-nitride barrier and a liner, and those layers do not scale: in a 12 nm wire the barrier consumes much of the cross-section that was supposed to carry current.

That crossover is why ruthenium and molybdenum are being qualified. Ruthenium's bulk resistivity is 7.1 µΩ·cm, more than four times copper's, but its mean free path is roughly 6.6 nm, so it degrades far more gently as the wire narrows — and it can run without a barrier at all, handing the whole cross-section back to the conductor. Below a certain width it wins on the only number that matters: the resistance of the wire you can actually build. Molybdenum is being pursued for the same reason.

Wide-bandgap materials own power, not logic. Silicon carbide and gallium nitride are not candidates to replace silicon in a CPU; they are replacing it in inverters, chargers and RF front ends. A wider bandgap raises the critical field roughly as the square, so a SiC device blocking 1,200 V uses a drift region about a tenth the thickness of the silicon equivalent, cutting on-resistance by orders of magnitude. 4H-SiC also conducts heat at around 400 W/m·K, better than silicon. GaN goes further at high frequency because an AlGaN/GaN heterostructure forms a two-dimensional electron gas with no intentional doping at all.

The ultra-wide-bandgap frontier runs into thermodynamics. β-Ga₂O₃ has a 4.8 eV bandgap and a projected critical field near 8 MV/cm, which on a Baliga figure of merit looks extraordinary. Its thermal conductivity is roughly 11–27 W/m·K depending on crystal direction, an order of magnitude below SiC. Diamond sits at 5.47 eV with thermal conductivity above 2,000 W/m·K and still has no manufacturable p-n process. Both are reminders that a materials decision is never one number.

Two-dimensional channels are the long bet on the logic side. As gate-all-around nanosheets thin the channel, silicon's own surface roughness begins to scatter carriers. A transition-metal dichalcogenide such as MoS₂ or WS₂ is a single crystalline sheet about 0.65 nm thick with no dangling bonds, close to the ideal ultra-thin body. The obstacles are contact resistance — metals on 2D layers form stubborn Schottky barriers — and growing wafer-scale monolayers with usable grain size. Nothing here is near production, and claims that it is should be read sceptically.

Here is where each material family actually enters the process flow:

Materials decide the back end too. Low-k dielectrics between copper lines cut capacitance but are mechanically fragile and crack during packaging; air gaps push the dielectric constant toward 1 at real structural cost. In advanced packaging the interposer, underfill and thermal interface materials set how much power a stack can dissipate, which is why an HBM stack is limited as much by its materials as by its logic.

Read materials through a *system-limits* lens rather than a *best-single-property* lens: every candidate that beats silicon on one axis — bandgap, mobility, breakdown field — loses on another the fab cannot work around, whether that is a missing native oxide, an unmanufacturable contact, thermal conductivity too low to remove the heat the device itself generates, or simply the absence of a 300 mm supply chain. Silicon's real advantage was never the physics. It was that everything else about it could be industrialised.