3D NAND

# Charge-Trap Storage Replaces the Floating Gate

## 5. 5. Charge Trap Storage Replaces the Floating Gate

The core memory mechanism in 3D NAND is charge-trap storage, not the floating gate that planar NAND and the earlier EEPROM/EPROM cells relied on, and the difference matters for exactly the fabrication reason the previous step raised. A floating gate is a small island of conductive material — charge placed on it spreads freely across the whole island, which is precisely why each floating gate must be physically isolated from its neighbors; any shared conductive path would let charge drain into an adjacent cell. A charge-trap layer, by contrast, is an insulator — typically silicon nitride — riddled with localized defect sites capable of holding an electron in place. Charge injected into a silicon-nitride layer gets caught at these trap sites and stays largely where it landed, without needing a hard physical boundary to keep it from spreading to a neighboring cell's share of that same continuous film. That property is what makes 3D NAND's manufacturing sequence possible: a single sheet of silicon nitride can run the length of a vertical channel and be shared across every cell stacked along it, because the material itself, not a patterned boundary, is doing the job of keeping each cell's stored charge local to that cell.

Floating Gate vs. Charge Trap: Why One Needs Isolation and the Other Does Not 5. Charge Trap Storage Replaces the Floating Gate FLOATING GATE (PLANAR) Conductive island, charge spreads freely across it Must be physically isolated from every neighbor Isolation is what breaks down when stacked CHARGE TRAP (3D NAND) Insulating silicon-nitride film with localized trap sites Charge stays near where it was injected One continuous film can be shared across many cells an insulator with traps needs no patterned boundary between cells
Why a Shared Film Is the Key to a Manufacturable Vertical Stack 5. Charge Trap Storage Replaces the Floating Gate ONE CONTINUOUS NITRIDE FILM Deposited once, running along the full vertical channel Crosses every memory layer in a single deposition step EACH CELL'S CHARGE STAYS LOCAL Trap-site physics, not a patterned wall, provides isolation No per-layer gate-patterning step is required this is why charge trapping, not floating-gate isolation, scales to many layers

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