polysilicon deposition doping

**Polysilicon Deposition and Doping** is the **foundational CMOS process module that deposits thin films of polycrystalline silicon using LPCVD (Low-Pressure Chemical Vapor Deposition) and controls their electrical properties through doping — serving as gate electrodes in legacy CMOS nodes, local interconnects, capacitor plates, and MEMS structural layers**. **Role in CMOS Processing** For decades, heavily-doped polysilicon was THE gate electrode material in every CMOS transistor. The poly gate's work function, combined with the gate oxide thickness, set the threshold voltage. Although advanced nodes (28nm and below) replaced poly with metal gates, polysilicon remains critical for non-gate uses: resistors, fuses, capacitor electrodes, DRAM storage nodes, and flash memory floating gates. **Deposition Process** - **LPCVD**: Silane (SiH4) is thermally decomposed at 580-650°C in a low-pressure (200-400 mTorr) horizontal or vertical furnace. At these conditions, SiH4 pyrolyzes on the hot wafer surface, depositing polycrystalline silicon with columnar grain structure. - **Temperature-Grain Size Relationship**: Below ~580°C, the deposited film is amorphous (no grain boundaries). Above ~620°C, grains form during deposition. Amorphous films are preferred when smooth, uniform surfaces are required (e.g., for subsequent patterning), then crystallized in a later anneal. - **Deposition Rate**: Typical rates of 5-20 nm/min. Higher temperatures increase rate but coarsen grain structure. Film thickness uniformity of ±1% across 150-wafer batch loads is achievable with proper gas flow and temperature profiling. **Doping Methods** - **In-Situ Doping**: Adding phosphine (PH3) or diborane (B2H6) to the silane gas during deposition produces uniformly-doped polysilicon as deposited. Eliminates the need for a separate implant step but complicates the deposition recipe (dopant gas alters nucleation kinetics and film morphology). - **Ion Implantation**: Depositing undoped poly first, then implanting phosphorus, arsenic, or boron. Provides more precise dose control and allows different doping for NMOS (N+) and PMOS (P+) gates on the same wafer. - **POCl3 Diffusion**: A legacy batch doping method where phosphorus oxychloride gas diffuses phosphorus into the poly surface at 850-950°C. Still used for some MEMS and solar cell applications. **Grain Boundary Effects** Dopant atoms segregate preferentially at grain boundaries, creating non-uniform doping profiles and limiting the minimum achievable sheet resistance. Grain boundary scattering also degrades carrier mobility, making polysilicon a significantly worse conductor than equivalently-doped single-crystal silicon. Polysilicon Deposition is **the workhorse film of semiconductor manufacturing** — its versatility as a gate, interconnect, resistor, and structural material made it the single most frequently deposited thin film in the history of integrated circuit fabrication.