rework
**Rework** is the **manufacturing operation of reversing a defective process step and repeating it correctly on partially processed wafers** — the preferred alternative to scrapping valuable in-process material when the defective layer can be cleanly removed without damaging underlying structures, most commonly applied to photolithography where the reversibility of photoresist enables complete process restart.
**Reworkable vs. Non-Reworkable Processes**
The fundamental constraint of semiconductor rework is materials-based: only processes that deposit or modify surface layers reversibly can be reworked. Processes that modify the substrate irreversibly cannot.
**Reworkable**
**Photolithography** (the primary rework candidate): Photoresist is a polymer coating applied on top of the wafer. If the coating is uneven, the exposure is misaligned, the focus is wrong, or the CD is out of spec, the resist can be completely removed (stripped) with solvent, oxygen plasma ashing, or SPM (H₂SO₄:H₂O₂) wet strip — leaving the underlying wafer unchanged. A fresh resist coat is then applied and the exposure repeated. Photolithography rework rates of 5–15% are common at advanced nodes due to tight overlay and CD specifications.
**Thin Film Depositions (selective cases)**: Poorly deposited dielectric or metal films can sometimes be stripped selectively without attacking underlying materials — oxide removed by HF, nitride removed by hot H₃PO₄, tungsten removed by H₂O₂. Feasibility depends on material selectivity and underlying layer sensitivity.
**Chemical Mechanical Planarization**: Under-polished wafers can return to CMP for additional polishing. Over-polished wafers cannot recover removed material.
**Not Reworkable**
**Ion Implantation**: Dopant atoms are permanently embedded in the crystal lattice. No wet or dry etch can selectively remove implanted dopants — the wafer must be scrapped if the wrong species, energy, or dose was used.
**Thermal Oxidation and Diffusion**: High-temperature processes drive atoms deep into silicon via diffusion. Once oxidized or dopants diffused, the reaction cannot be reversed.
**Rework Risk Assessment**
Rework is not risk-free. Each rework cycle exposes the wafer to additional chemical, thermal, and mechanical stress:
**Underlying Layer Damage**: Strip chemicals may attack the layer beneath the resist — SPM can attack copper, HF attacks oxide. Resist strip must be selected based on underlying material compatibility.
**Particle Addition**: Each additional process step adds particles. Heavily reworked wafers (>3× rework) often show elevated particle counts from accumulated handling damage.
**Reliability Risk**: Repeated thermal cycles and chemical exposures can degrade gate dielectric integrity, increase junction leakage, or cause thin metal films to interdiffuse. Rework authorization requires review of the cumulative thermal budget and chemical exposure history.
**Economic Analysis**: Rework authorization balances the cost of rework against the value of the material saved. At advanced nodes, a wafer at metal layer 5 may represent $15,000–$30,000 of accumulated processing value — making even expensive rework economical compared to scrap.
**Rework** is **the do-over in a world that usually does not allow second chances** — the carefully controlled reversal of a defective layer that recovers valuable material from the brink of scrap while managing the cumulative risks that each additional process cycle introduces.